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KSZ8863FLLI

更新时间: 2024-11-16 02:46:39
品牌 Logo 应用领域
美国微芯 - MICROCHIP 局域网(LAN)标准
页数 文件大小 规格书
92页 2921K
描述
Integrated 3-Port 10/100 Managed Switch with PHYs

KSZ8863FLLI 数据手册

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KSZ8863MLL/FLL/RLL  
Integrated 3-Port 10/100 Managed Switch  
with PHYs  
- Non-Blocking Switch Fabric Ensures Fast  
Packet Delivery by Utilizing a 1k MAC Address  
Lookup Table and a Store-and-Forward Archi-  
tecture  
- Full-Duplex IEEE 802.3x Flow Control (PAUSE)  
with Force Mode Option  
- Half-Duplex Back Pressure Flow Control  
- HP Auto MDI-X for Reliable Detection of and  
Correction for Straight-Through and Crossover  
Cables with Disable and Enable Option  
- LinkMD® TDR-Based Cable Diagnostics Permit  
Identification of Faulty Copper Cabling  
- MII Interface Supports Both MAC Mode and  
PHY Mode  
Features  
• Advanced Switch Features  
- IEEE 802.1q VLAN Support for Up to 16 Groups  
(Full Range of VLAN IDs)  
- VLAN ID Tag/Untag Options, Per Port Basis  
- IEEE 802.1p/q Tag Insertion or Removal on a  
Per Port Basis (Egress)  
- Programmable Rate Limiting at the Ingress and  
Egress on a Per Port Basis  
- Broadcast Storm Protection with Percent  
Control (Global and Per Port Basis)  
- IEEE 802.1d Rapid Spanning Tree Protocol  
Support  
- Tail Tag Mode (1 byte Added before FCS) Sup-  
port at Port 3 to Inform the Processor which  
Ingress Port Receives the Packet and its Prior-  
ity  
- Comprehensive LED Indicator Support for Link,  
Activity, Full-/Half-Duplex and 10/100 Speed  
- HBM ESD Rating 4 kV  
• Switch Monitoring Features  
- Bypass Feature that Automatically Sustains the  
Switch Function between Port 1 and Port 2  
when CPU (Port 3 Interface) Goes to the Sleep  
Mode  
- Port Mirroring/Monitoring/Sniffing: Ingress and/  
or Egress Traffic to Any Port or MII  
- MIB Counters for Fully Compliant Statistics  
Gathering 34 MIB Counters Per Port  
- Loopback Modes for Remote Diagnostic of Fail-  
ure  
• Low Power Dissipation  
- Full-Chip Software Power-Down (Register Con-  
figuration Not Saved)  
- Self-Address Filtering  
- Individual MAC Address for Port 1 and Port 2  
- Supports RMII Interface and 50 MHz Reference  
Clock Output  
- IGMP Snooping (IPv4) Support for Multicast  
Packet Filtering  
- Energy-Detect Mode Support  
- IPv4/IPv6 QoS Support  
- Dynamic Clock Tree Shutdown Feature  
- Per Port Based Software Power-Save on PHY  
(Idle Link Detection, Register Configuration Pre-  
served)  
- Voltages: Single 3.3V Supply with Internal 1.8V  
LDO for 3.3V VDDIO  
- Optional 3.3V, 2.5V, and 1.8V for VDDIO  
- Transceiver Power 3.3V for VDDA_3.3  
• Industrial Temperature Range: –40°C to +85°C  
• Available in a 48-Pin LQFP, Lead-Free Package  
- MAC Filtering Function to Forward Unknown  
Unicast Packets to Specified Port  
• Comprehensive Configuration Register Access  
- Serial Management Interface (SMI) to All Inter-  
nal Registers  
- MII Management (MIIM) Interface to PHY Reg-  
isters  
- High Speed SPI and I2C Interface to All Internal  
Registers  
- I/O Pins Strapping and EEPROM to Program  
Selective Registers in Unmanaged Switch  
Mode  
Applications  
- Control Registers Configurable on the Fly (Port-  
Priority, 802.1p/d/q, AN…)  
• VoIP Phone  
• Set-Top/Game Box  
• QoS/CoS Packet Prioritization Support  
- Per Port, 802.1p and DiffServ-Based  
- Re-Mapping of 802.1p Priority Field Per Port  
basis, Four Priority Levels  
• Proven Integrated 3-Port 10/100 Ethernet Switch  
- 3rd Generation Switch with Three MACs and  
Two PHYs Fully Compliant with IEEE 802.3u  
Standard  
• Automotive  
• Industrial Control  
• IPTV POF  
• SOHO Residential Gateway  
• Broadband Gateway/Firewall/VPN  
• Integrated DSL/Cable Modem  
• Wireless LAN Access Point + Gateway  
• Standalone 10/100 Switch  
2017-2021 Microchip Technology Inc.  
DS00002335C-page 1  

KSZ8863FLLI 替代型号

型号 品牌 替代类型 描述 数据表
KSZ8863MLLI MICROCHIP

完全替代

DATACOM, LAN SWITCHING CIRCUIT, PQFP48
KSZ8863RLL MICROCHIP

类似代替

DATACOM, LAN SWITCHING CIRCUIT, PQFP48
KSZ8863RLLI MICROCHIP

类似代替

DATACOM, LAN SWITCHING CIRCUIT, PQFP48

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