Datasheet > KSZ8863RLL

KSZ8863RLL

更新时间： 2024-02-01 18:01:02

品牌	Logo	应用领域
美国微芯 - MICROCHIP		局域网 PC 电信开关电信集成电路
页数	文件大小	规格书
92页	1359K
描述
DATACOM, LAN SWITCHING CIRCUIT, PQFP48

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技术参数
数据手册
替代型号

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KSZ8863RLL 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	LFQFP,	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	1.1
Samacsys Confidence：	4	Samacsys Status：	Released
Samacsys PartID：	938013	Samacsys Pin Count：	48
Samacsys Part Category：	Integrated Circuit	Samacsys Package Category：	Quad Flat Packages
Samacsys Footprint Name：	48 LEAD LQFP_1	Samacsys Released Date：	2018-05-22 10:38:35
Is Samacsys：	N	JESD-30 代码：	S-PQFP-G48
JESD-609代码：	e3	长度：	7 mm
功能数量：	1	端子数量：	48
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	座面最大高度：	1.6 mm
标称供电电压：	1.8 V	表面贴装：	YES
电信集成电路类型：	LAN SWITCHING CIRCUIT	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7 mm
Base Number Matches：	1

KSZ8863RLL 数据手册

KSZ8863MLL/FLL/RLL

Integrated 3-Port 10/100 Managed Switch

with PHYs

- Non-Blocking Switch Fabric Ensures Fast

Packet Delivery by Utilizing a 1k MAC Address

Lookup Table and a Store-and-Forward Archi-

tecture

- Full-Duplex IEEE 802.3x Flow Control (PAUSE)

with Force Mode Option

Features

• Advanced Switch Features

- IEEE 802.1q VLAN Support for Up to 16 Groups

(Full Range of VLAN IDs)

- VLAN ID Tag/Untag Options, Per Port Basis

- IEEE 802.1p/q Tag Insertion or Removal on a

Per Port Basis (Egress)

- Programmable Rate Limiting at the Ingress and

Egress on a Per Port Basis

- Broadcast Storm Protection with Percent Con-

trol (Global and Per Port Basis)

- IEEE 802.1d Rapid Spanning Tree Protocol

Support

- Half-Duplex Back Pressure Flow Control

- HP Auto MDI-X for Reliable Detection of and

Correction for Straight-Through and Crossover

Cables with Disable and Enable Option

- LinkMD TDR-Based Cable Diagnostics Permit

Identification of Faulty Copper Cabling

- MII Interface Supports Both MAC Mode and

PHY Mode

- Tail Tag Mode (1 byte Added before FCS) Sup-

port at Port 3 to Inform the Processor which

Ingress Port Receives the Packet and its Prior-

ity

- Comprehensive LED Indicator Support for Link,

Activity, Full-/Half-Duplex and 10/100 Speed

- HBM ESD Rating 4 kV

• Switch Monitoring Features

- Bypass Feature that Automatically Sustains the

Switch Function between Port 1 and Port 2

when CPU (Port 3 Interface) Goes to the Sleep

Mode

- Port Mirroring/Monitoring/Sniffing: Ingress and/

or Egress Traffic to Any Port or MII

- MIB Counters for Fully Compliant Statistics

Gathering 34 MIB Counters Per Port

- Loopback Modes for Remote Diagnostic of Fail-

ure

• Low Power Dissipation

- Full-Chip Software Power-Down (Register Con-

figuration Not Saved)

- Self-Address Filtering

- Individual MAC Address for Port 1 and Port 2

- Supports RMII Interface and 50 MHz Reference

Clock Output

- IGMP Snooping (IPv4) Support for Multicast

Packet Filtering

- Energy-Detect Mode Support

- IPv4/IPv6 QoS Support

- Dynamic Clock Tree Shutdown Feature

- Per Port Based Software Power-Save on PHY

(Idle Link Detection, Register Configuration Pre-

served)

- Voltages: Single 3.3V Supply with Internal 1.8V

LDO for 3.3V VDDIO

- MAC Filtering Function to Forward Unknown

Unicast Packets to Specified Port

• Comprehensive Configuration Register Access

- Serial Management Interface (SMI) to All Inter-

nal Registers

- MII Management (MIIM) Interface to PHY Reg-

isters

- High Speed SPI and I C Interface to All Internal

- Optional 3.3V, 2.5V, and 1.8V for VDDIO

- Transceiver Power 3.3V for VDDA_3.3

• Industrial Temperature Range: –40°C to +85°C

• Available in a 48-Pin LQFP, Lead-Free Package

Registers

- I/O Pins Strapping and EEPROM to Program

Selective Registers in Unmanaged Switch

Mode

Applications

- Control Registers Configurable on the Fly (Port-

Priority, 802.1p/d/q, AN…)

• VoIP Phone

• Set-Top/Game Box

• QoS/CoS Packet Prioritization Support

- Per Port, 802.1p and DiffServ-Based

- Re-Mapping of 802.1p Priority Field Per Port

basis, Four Priority Levels

• Proven Integrated 3-Port 10/100 Ethernet Switch

- 3rd Generation Switch with Three MACs and

Two PHYs Fully Compliant with IEEE 802.3u

Standard

• Automotive

• Industrial Control

• IPTV POF

• SOHO Residential Gateway

• Broadband Gateway/Firewall/VPN

• Integrated DSL/Cable Modem

• Wireless LAN Access Point + Gateway

• Standalone 10/100 Switch

 2017 Microchip Technology Inc.

DS00002335B-page 1

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中文翻译

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KSZ8863RLL 替代型号

型号	品牌	替代类型	描述	数据表
KSZ8863FLLI	MICROCHIP	类似代替	Integrated 3-Port 10/100 Managed Switch with PHYs
KSZ8863RLLI	MICROCHIP	类似代替	DATACOM, LAN SWITCHING CIRCUIT, PQFP48
KSZ8863MLLI	MICROCHIP	类似代替	DATACOM, LAN SWITCHING CIRCUIT, PQFP48

与KSZ8863RLL相关器件

型号	品牌	获取价格	描述	数据表
KSZ8863RLLI	MICROCHIP	获取价格	DATACOM, LAN SWITCHING CIRCUIT, PQFP48
KSZ8863RLLITR	MICROCHIP	获取价格	Integrated 3-Port 10/100 Managed Switch with PHYs
KSZ8863RLLI-TR	MICROCHIP	获取价格	Integrated 3-Port 10/100 Managed Switch with PHYs
KSZ8863RLLTR	MICROCHIP	获取价格	Integrated 3-Port 10/100 Managed Switch with PHYs
KSZ8863RLL-TR	MICROCHIP	获取价格	Integrated 3-Port 10/100 Managed Switch with PHYs
KSZ8864	MICROCHIP	获取价格	The KSZ8864 is a highly-integrated, Layer 2 managed 4-port switch with optimized design, p
KSZ8864CNX	MICROCHIP	获取价格	Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
KSZ8864CNXC	MICROCHIP	获取价格	Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
KSZ8864CNXC-TR	MICROCHIP	获取价格	IC SWITCH 4 PORT MII/RMII 64QFN
KSZ8864CNXI	MICROCHIP	获取价格	IC ETHERNET SWITCH 4PORT 64QFN

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