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KSZ8873FLLU

更新时间: 2024-11-15 15:36:31
品牌 Logo 应用领域
美国微芯 - MICROCHIP 局域网电信开关电信集成电路
页数 文件大小 规格书
95页 1395K
描述
LAN Switching Circuit

KSZ8873FLLU 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LFQFP,Reach Compliance Code:compliant
风险等级:5.71JESD-30 代码:S-PQFP-G64
长度:12 mm功能数量:1
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
筛选级别:AEC-Q100; TS 16949座面最大高度:1.6 mm
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:LAN SWITCHING CIRCUIT温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:12 mmBase Number Matches:1

KSZ8873FLLU 数据手册

 浏览型号KSZ8873FLLU的Datasheet PDF文件第2页浏览型号KSZ8873FLLU的Datasheet PDF文件第3页浏览型号KSZ8873FLLU的Datasheet PDF文件第4页浏览型号KSZ8873FLLU的Datasheet PDF文件第5页浏览型号KSZ8873FLLU的Datasheet PDF文件第6页浏览型号KSZ8873FLLU的Datasheet PDF文件第7页 
KSZ8873MLL/FLL/RLL  
Integrated 3-Port 10/100 Managed Switch  
with PHYs  
Standard  
Features  
• Advanced Switch Features  
- IEEE 802.1q VLAN Support for Up to 16 Groups  
(Full Range of VLAN IDs)  
- VLAN ID Tag/Untag Options, Per Port Basis  
- IEEE 802.1p/q Tag Insertion or Removal on a  
Per Port Basis (Egress)  
- Programmable Rate Limiting at the Ingress and  
Egress on a Per Port Basis  
- Broadcast Storm Protection with Percent Con-  
trol (Global and Per Port Basis)  
- IEEE 802.1d Rapid Spanning Tree Protocol  
Support  
- Tail Tag Mode (1 byte Added before FCS) Sup-  
port at Port 3 to Inform the Processor which  
Ingress Port Receives the Packet and its Prior-  
ity  
- Non-Blocking Switch Fabric Ensures Fast  
Packet Delivery by Utilizing a 1k MAC Address  
Lookup Table and a Store-and-Forward Archi-  
tecture  
- Full-Duplex IEEE 802.3x Flow Control (PAUSE)  
with Force Mode Option  
- Half-Duplex Back Pressure Flow Control  
- HP Auto MDI-X for Reliable Detection of and  
Correction for Straight-Through and Crossover  
Cables with Disable and Enable Option  
®
- LinkMD TDR-Based Cable Diagnostics Permit  
Identification of Faulty Copper Cabling on Port 2  
- Comprehensive LED Indicator Support for Link,  
Activity, Full-/Half-Duplex and 10/100 Speed  
- HBM ESD Rating 3 kV  
• Switch Monitoring Features  
- Port Mirroring/Monitoring/Sniffing: Ingress and/  
or Egress Traffic to Any Port or MII  
- MIB Counters for Fully Compliant Statistics  
Gathering 34 MIB Counters Per Port  
- Loopback Modes for Remote Diagnostic of Fail-  
ure  
• Low Power Dissipation  
- Full-Chip Software Power-Down (Register Con-  
figuration Not Saved)  
- Bypass Feature that Automatically Sustains the  
Switch Function between Port 1 and Port 2  
when CPU (Port 3 Interface) Goes into Sleep  
Mode  
- Self-Address Filtering  
- Individual MAC Address for Port 1 and Port 2  
- Supports RMII Interface and 50 MHz Reference  
Clock Output  
- MAC MII Interface Supports Both MAC and  
PHY Modes  
- Full-Chip Hardware Power-Down (Register  
Configuration Not Saved)  
- Energy-Detect Mode Support  
- IGMP Snooping (IPv4) Support for Multicast  
Packet Filtering  
- Dynamic Clock Tree Shutdown Feature  
- Per Port Based Software Power-Save on PHY  
(Idle Link Detection, Register Configuration Pre-  
served)  
- Voltages: Single 3.3V Supply with Internal 1.8V  
LDO for 3.3V VDDIO  
- IPv4/IPv6 QoS Support  
- MAC Filtering Function to Forward Unknown  
Unicast Packets to Specified Port  
• Comprehensive Configuration Register Access  
- Serial Management Interface (SMI) to All Inter-  
nal Registers  
- Optional 3.3V, 2.5V, and 1.8V for VDDIO  
- Transceiver Power 3.3V for VDDA_3.3  
• Industrial Temperature Range: –40°C to +85°C  
• Available in a 64-Pin LQFP, Lead-Free Package  
- MII Management (MIIM) Interface to PHY Reg-  
isters  
- High Speed SPI and I C Interface to All Internal  
2
Registers  
- I/O Pins Strapping and EEPROM to Program  
Selective Registers in Unmanaged Switch  
Mode  
Applications  
• VoIP Phone  
• Set-Top/Game Box  
• Automotive Ethernet  
- Control Registers Configurable on the Fly (Port-  
Priority, 802.1p/d/q, AN…)  
• QoS/CoS Packet Prioritization Support  
• Per Port, 802.1p and DiffServ-Based  
- Re-Mapping of 802.1p Priority Field Per Port  
basis, Four Priority Levels  
• Proven Integrated 3-Port 10/100 Ethernet Switch  
- 3rd Generation Switch with Three MACs and  
Two PHYs Fully Compliant with IEEE 802.3u  
• Industrial Control  
• IPTV POF  
• SOHO Residential Gateway  
• Broadband Gateway/Firewall/VPN  
• Integrated DSL/Cable Modem  
• Wireless LAN Access Point + Gateway  
• Standalone 10/100 Switch  
2017 Microchip Technology Inc.  
DS00002348A-page 1  

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