KSZ8893MBL

更新时间： 2024-09-14 12:02:27

品牌	Logo	应用领域
麦瑞 - MICREL		电信集成电路开关局域网局域网（LAN）标准
页数	文件大小	规格书
116页	703K
描述
Integrated 3-Port 10/100 Managed Switch with PHYs

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中文翻译

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数据手册

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KSZ8893MBL 数据手册

KSZ8893MQL/MBL

Integrated 3-Port 10/100 Managed

Switch with PHYs

Rev. 1.6

with patented mixed-signal low-power technology,

three media access control (MAC) units, a high-

speed non-blocking switch fabric, a dedicated

address lookup engine, and an on-chip frame buffer

memory.

General Description

The KSZ8893MQL/MBL, a highly integrated layer 2

managed switch, is designed for low port count,

cost-sensitive 10/100 Mbps switch systems. It offers

an extensive feature set that includes rate limiting,

tag/port-based VLAN, QoS priority, management,

management information base (MIB) counters,

RMII/MII/SNI, and CPU control/data interfaces to

effectively address both current and emerging Fast

Ethernet applications.

Both PHY units support 10BASE-T and 100BASE-

TX. In addition, one PHY unit supports 100BASE-FX.

The KSZ8893MQL/MBL comes in a lead-free

package, and is also available in industrial

temperature-grade

KS8893MQLI/MBLI

and

Automotive-grade KSZ8893 MQL AM. (See Ordering

Information).

The KSZ8893MQL/MBL contains two 10/100

transceivers

___________________________________________________________________________________________________

Functional Diagram

1K LOOK-UP

ENGINE

10/100

T/TX/FX

PHY 1

HP AUTO

MDIX

10/100

MAC 1

QUEUE

MANAGEMENT

10/100

T/TX

PHY 2

HP AUTO

MDIX

10/100

MAC 2

BUFFER

MANAGEMENT

RMII/MII/

SNI

10/100

MAC 3

FRAME

BUFFERS

SNI

SPI

MIB

COUNTERS

SPI

MIIM

CONTROL

EEPROM

REGISTERS

INTERFACE

SMI

I2C

P1 LED[3:0]

P2 LED[3:0]

LED

DRIVERS

STRAP IN

CONFIGURATION

LinkMD is a registered trademark of Micrel, Inc.

Product names used in this datasheet are for identification purposes only and may be trademarks of their respective companies.

February 2010

M9999-021110-1.6

12 3 4 5 6 7...116

中文翻译

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