Datasheet > KM48V8000BT-L6

KM48V8000BT-L6

更新时间： 2024-11-03 06:12:23

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
20页	341K
描述
Fast Page DRAM, 8MX8, 60ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, TSOP2-32

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中文翻译

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数据手册

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KM48V8000BT-L6 数据手册

KM48V8000B,KM48V8100B

CMOS DRAM

8M x 8bit CMOS Dynamic RAM with Fast Page Mode

DESCRIPTION

This is a family of 8,388,608 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells

within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal or Low power) are

optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Fur-

thermore, Self-refresh operation is available in L-version. This 8Mx8 Fast Page Mode DRAM family is fabricated using Samsung¢s

advanced CMOS process to realize high band-width, low power consumption and high reliability.

• Fast Page Mode operation

FEATURES

• CAS-before-RAS refresh capability

•

Part Identification

• RAS-only and Hidden refresh capability

• Self-refresh capability (L-ver only)

• Fast parallel test mode capability

• LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

- KM48V8000B/B-L(3.3V, 8K Ref.)

- KM48V8100B/B-L(3.3V, 4K Ref.)

•

Active Power Dissipation

Unit : mW

• Available in Plastic SOJ and TSOP(II) packages

• +3.3V±0.3V power supply

Speed

-45

-5

360

324

288

468

432

396

-6

• Refresh Cycles

Part

NO.

Refresh

cycle

Refresh time

FUNCTIONAL BLOCK DIAGRAM

Normal

L-ver

KM48V8000B*

KM48V8100B

RAS

CAS

64ms

128ms

Vcc

Vss

Control

Clocks

VBB Generator

Row Decoder

* Access mode & RAS only refresh mode

: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)

CAS-before-RAS & Hidden refresh mode

Refresh Timer

Data in

Buffer

: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)

Refresh Control

Refresh Counter

Memory Array

8,388,608 x 8

Cells

DQ0

DQ7

•

Performance Range

Speed

Data out

Buffer

Row Address Buffer

Col. Address Buffer

tRAC

45ns

50ns

60ns

tCAC

12ns

13ns

15ns

tRC

tPC

A0~A12

(A0~A11)*1

-45

-5

80ns

90ns

110ns

31ns

35ns

40ns

A0~A9

(A0~A10)*1

Column Decoder

-6

Note) *1 : 4K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...20

中文翻译

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与KM48V8000BT-L6相关器件

型号	品牌	获取价格	描述	数据表
KM48V8000CK-L5	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
KM48V8004B	SAMSUNG	获取价格	8M x 8bit CMOS Dynamic RAM with Extended Data Out
KM48V8004BK-4K	SAMSUNG	获取价格	EDO DRAM, 8MX8, 40ns, CMOS, PDSO32
KM48V8004BK-5TH	SAMSUNG	获取价格	EDO DRAM, 8MX8, 50ns, CMOS, PDSO32
KM48V8004BK-5TM	SAMSUNG	获取价格	EDO DRAM, 8MX8, 50ns, CMOS, PDSO32
KM48V8004BK-6K	SAMSUNG	获取价格	EDO DRAM, 8MX8, 60ns, CMOS, PDSO32
KM48V8004BK-6T	SAMSUNG	获取价格	暂无描述
KM48V8004BK-6TH	SAMSUNG	获取价格	EDO DRAM, 8MX8, 60ns, CMOS, PDSO32
KM48V8004BK-L4	SAMSUNG	获取价格	EDO DRAM, 8MX8, 40ns, CMOS, PDSO32
KM48V8004BK-L5	SAMSUNG	获取价格	EDO DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32

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