Datasheet > KM416V4100C

KM416V4100C

更新时间： 2024-11-11 22:47:35

品牌	Logo	应用领域
三星 - SAMSUNG		/
页数	文件大小	规格书
9页	92K
描述
4M x 16bit CMOS Dynamic RAM with Fast Page Mode

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中文翻译

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数据手册

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KM416V4100C 数据手册

KM416V4000C,KM416V4100C

CMOS DRAM

4M x 16bit CMOS Dynamic RAM with Fast Page Mode

DESCRIPTION

This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory

cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal or Low power) are

optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Fur-

thermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung¢s

advanced CMOS process to realize high band-width, low power consumption and high reliability.

• Fast Page Mode operation

FEATURES

• 2CAS Byte/Word Read/Write operation

• Part Identification

• CAS-before-RAS refresh capability

• RAS-only and Hidden refresh capability

• Self-refresh capability (L-ver only)

• Fast parallel test mode capability

• LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

- KM416V4000C/C-L(3.3V, 8K Ref.)

- KM416V4100C/C-L(3.3V, 4K Ref.)

• ActivePowerDissipation

Unit : mW

Speed

-45

-5

• Available in Plastic TSOP(II) packages

• +3.3V±0.3V power supply

324

288

252

468

432

396

-6

• Refresh Cycles

Part

NO.

Refresh

cycle

Refresh time

FUNCTIONAL BLOCK DIAGRAM

Normal

L-ver

KM416V4000C*

KM416V4100C

RAS

UCAS

LCAS

64ms

128ms

Vcc

Vss

Control

Clocks

VBB Generator

* Access mode & RAS only refresh mode

Lower

Data in

Buffer

: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)

CAS-before-RAS & Hidden refresh mode

DQ0

Row Decoder

Refresh Timer

DQ7

Lower

Data out

Buffer

: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)

Refresh Control

Memory Array

4,194,304 x 16

Cells

Refresh Counter

Row Address Buffer

Col. Address Buffer

Upper

Data in

Buffer

• Performance Range

DQ8

DQ15

Speed

tRAC

45ns

50ns

60ns

tCAC

12ns

13ns

15ns

tRC

80ns

90ns

110ns

tPC

A0~A12

(A0~A11)*1

Upper

Data out

Buffer

-45

-5

31ns

35ns

40ns

A0~A8

(A0~A9)*1

Column Decoder

-6

Note) *1 : 4K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...9

中文翻译

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与KM416V4100C相关器件

型号	品牌	获取价格	描述	数据表
KM416V4100C-S45	SAMSUNG	获取价格	Fast Page DRAM, 4MX16, 45ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4100CS-45	SAMSUNG	获取价格	4MX16 FAST PAGE DRAM, 45ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4100C-S6	SAMSUNG	获取价格	Fast Page DRAM, 4MX16, 60ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4100CS-6	SAMSUNG	获取价格	4MX16 FAST PAGE DRAM, 60ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4100C-SL5	SAMSUNG	获取价格	Fast Page DRAM, 4MX16, 50ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4100CS-L5	SAMSUNG	获取价格	4MX16 FAST PAGE DRAM, 50ns, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4100C-SL6	SAMSUNG	获取价格	Fast Page DRAM, 4MX16, 60ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50
KM416V4104A-7	SAMSUNG	获取价格	EDO DRAM, 4MX16, 70ns, CMOS, PDSO50, TSOP2-50
KM416V4104A-L5	SAMSUNG	获取价格	EDO DRAM, 4MX16, 50ns, CMOS, PDSO50, TSOP2-50
KM416V4104A-L6	SAMSUNG	获取价格	EDO DRAM, 4MX16, 60ns, CMOS, PDSO50, TSOP2-50

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