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KM23C4100DT PDF预览

KM23C4100DT

更新时间: 2024-11-17 22:32:15
品牌 Logo 应用领域
三星 - SAMSUNG 存储内存集成电路光电二极管有原始数据的样本ROM
页数 文件大小 规格书
4页 76K
描述
4M-Bit (512Kx8 /256Kx16) CMOS MASK ROM

KM23C4100DT 技术参数

生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2,针数:44
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.84
Is Samacsys:N最长访问时间:80 ns
其他特性:USER CONFIGURABLE AS 256K X 16JESD-30 代码:R-PDSO-G40
长度:18.41 mm内存密度:4194304 bit
内存集成电路类型:MASK ROM内存宽度:8
功能数量:1端子数量:44
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

KM23C4100DT 数据手册

 浏览型号KM23C4100DT的Datasheet PDF文件第2页浏览型号KM23C4100DT的Datasheet PDF文件第3页浏览型号KM23C4100DT的Datasheet PDF文件第4页 
KM23C4100D(E)T  
CMOS MASK ROM  
4M-Bit (512Kx8 /256Kx16) CMOS MASK ROM  
GENERAL DESCRIPTION  
FEATURES  
The KM23C4100D(E)T is a fully static mask programmable  
ROM fabricated using silicon gate CMOS process technology,  
and is organized either as 524,288 x 8 bit(byte mode) or as  
262,144 x 16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
· Switchable organization  
524,288 x 8(byte mode)  
262,144 x 16(word mode)  
· Fast access time : 80ns(Max.)  
· Supply voltage : single +5V  
· Current consumption  
Operating : 50mA(Max.)  
Standby : 50mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor,  
and data memory, character generator.  
· Package  
-. KM23C4100D(E)T : 44-TSOP2-400  
The KM23C4100D(E)T is packaged in a 44-TSOP2.  
FUNCTIONAL BLOCK DIAGRAM  
PRODUCT INFORMATION  
Operating  
Temp  
Vcc  
Range  
Speed  
(ns)  
Product  
A17  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
KM23C4100DT  
KM23C4100DET  
0°C~70°C  
5.0V  
80  
(262,144x16/  
524,288x8)  
-20°C~85°C  
DECODER  
Y
SENSE AMP.  
PIN CONFIGURATION  
BUFFERS  
AND  
DATA OUT  
BUFFERS  
DECODER  
A0  
A-1  
N.C  
N.C  
N.C  
N.C  
A8  
1
2
44  
43  
42  
41  
40  
39  
. . .  
A17  
A7  
3
4
A9  
CE  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
A10  
A11  
5
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
6
OE  
38 A12  
37 A13  
7
BHE  
8
A14  
36  
9
A15  
35  
10  
11  
A16  
34  
33  
32  
31  
30  
Pin Name  
A0 - A17  
Pin Function  
TSOP  
BHE  
VSS  
CE 12  
VSS  
13  
Address Inputs  
OE 14  
Q15/A-1  
Q7  
Q0 - Q14  
Data Outputs  
Q0  
Q8  
Q1  
Q9  
15  
16  
17  
18  
Output 15(Word mode)/  
LSB Address(Byte mode)  
29 Q14  
Q15 /A-1  
Q6  
Q13  
Q5  
28  
27  
26  
25  
24  
23  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Q2 19  
Q10 20  
Q12  
Q4  
Q3  
21  
22  
OE  
Output Enable  
Power(+5V)  
Q11  
VCC  
VCC  
VSS  
N.C  
Ground  
KM23C4100D(E)T  
No Connection  

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