Datasheet > KL14P80M48SF0

KL14P80M48SF0

更新时间： 2024-09-15 12:30:23

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		/
页数	文件大小	规格书
47页	1566K
描述
KL14 Sub-Family Data Sheet

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数据手册

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KL14P80M48SF0 数据手册

Document Number: KL14P80M48SF0

Rev. 3, 9/19/2012

Freescale Semiconductor

Data Sheet: Technical Data

KL14P80M48SF0

KL14 Sub-Family Data Sheet

Supports the following:

MKL14Z32VFM4, MKL14Z64VFM4,

MKL14Z32VFT4, MKL14Z64VFT4,

MKL14Z32VLH4, MKL14Z64VLH4,

MKL14Z32VLK4, and MKL14Z64VLK4

Features

Security and integrity modules

– 80-bit unique identification (ID) number per chip

•

Operating Characteristics

– Voltage range: 1.71 to 3.6 V

•

Human-machine interface

– General-purpose input/output

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 105°C

Analog modules

– 12-bit SAR ADC

– Analog comparator (CMP) containing a 6-bit DAC

and programmable reference input

Performance

– Up to 48 MHz ARM® Cortex-M0+ core

•

Memories and memory interfaces

– Up to 64 KB program flash memory

– Up to 8 KB RAM

Timers

•

– Six channel Timer/PWM (TPM)

– Two 2-channel Timer/PWM (TPM)

– Periodic interrupt timers

– 16-bit low-power timer (LPTMR)

– Real-time clock

Clocks

•

– 32 kHz to 40 kHz or 3 MHz to 32 MHz crystal

oscillator

– Multi-purpose clock source

System peripherals

Communication interfaces

– Two 8-bit SPI modules

– Two I2C modules

– One low power UART module

– Two UART modules

– Nine low-power modes to provide power

optimization based on application requirements

– 4-channel DMA controller, supporting up to 63

request sources

– COP Software watchdog

– Low-leakage wakeup unit

– SWD interface and Micro Trace buffer

– Bit Manipulation Engine (BME)

Freescale reserves the right to change the detail specifications as may be

required to permit improvements in the design of its products.

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