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KAD5510P-50 PDF预览

KAD5510P-50

更新时间: 2024-11-25 05:40:39
品牌 Logo 应用领域
英特矽尔 - INTERSIL 转换器
页数 文件大小 规格书
27页 629K
描述
10-Bit, 500MSPS A/D Converter

KAD5510P-50 数据手册

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KAD5510P-50  
®
Data Sheet  
January 30, 2009  
FN6811.1  
10-Bit, 500MSPS A/D Converter  
Features  
The KAD5510P-50 is a low-power, high-performance, 10-bit,  
500MSPS analog-to-digital converter designed with Intersil’s  
proprietary FemtoCharge™ technology on a standard  
CMOS process. The KAD5510P-50 is part of a  
pin-compatible portfolio of 10, 12 and 14-bit A/Ds with  
sample rates ranging from 125MSPS to 500MSPS.  
• Programmable Gain, Offset and Skew Control  
• 1.3GHz Analog Input Bandwidth  
• 60fs Clock Jitter  
• Over-Range Indicator  
• Selectable Clock Divider: ÷1 or ÷2  
• Clock Phase Selection  
The device utilizes two time-interleaved 10-bit, 250MSPS  
A/D cores to achieve the ultimate sample rate of 500MSPS.  
A single 500MHz conversion clock is presented to the  
converter, and all interleave clocking is managed internally.  
• Nap and Sleep Modes  
• Two’s Complement, Gray Code or Binary Data Format  
• DDR LVDS-Compatible or LVCMOS Outputs  
• Programmable Built-in Test Patterns  
• Single-Supply 1.8V Operation  
• Pb-Free (RoHS Compliant)  
A serial peripheral interface (SPI) port allows for extensive  
configurability, as well as fine control of matching  
characteristics (gain, offset, skew) between the two  
converter cores. These adjustments allow the user to  
minimize spurs associated with the interleaving process.  
Applications  
Digital output data is presented in selectable LVDS or CMOS  
formats. The KAD5510P-50 is available in a 72-contact QFN  
package with an exposed paddle. Performance is specified  
over the full industrial temperature range (-40°C to +85°C).  
• Radar and Satellite Antenna Array Processing  
• Broadband Communications  
• High-Performance Data Acquisition  
Pin-Compatible Family  
Key Specifications  
• SNR = 60.7dBFS for f = 105MHz (-1dBFS)  
IN  
SPEED  
MODEL  
KAD5514P-25  
RESOLUTION  
(MSPS)  
250  
210  
170  
125  
500  
250  
• SFDR = 83.2dBc for f = 105MHz (-1dBFS)  
IN  
14  
14  
14  
14  
12  
12  
12  
12  
12  
10  
• Power Consumption = 414mW  
KAD5514P-21  
KAD5514P-17  
KAD5514P-12  
KAD5512P-50  
CLKP  
CLOCK GENERATION  
&
CLKOUTP  
CLKOUTN  
KAD5512P-25, KAD5512HP-25  
KAD5512P-21, KAD5512HP-21  
KAD5512P-17, KAD5512HP-17  
KAD5512P-12, KAD5512HP-12  
KAD5510P-50  
CLKN  
INTERLEAVE CONTROL  
210  
170  
125  
10-BIT  
250 MSPS  
ADC  
D[9:0]P  
D[9:0]N  
500  
SHA  
VREF  
ORP  
ORN  
VINP  
VINN  
DIGITAL  
ERROR  
CORRECTION  
OUTFMT  
OUTMODE  
10-BIT  
250 MSPS  
ADC  
VCM  
SHA  
VREF  
+
1.25V  
SPI  
CONTROL  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
FemtoCharge is a trademark of Kenet Inc. Copyright Intersil Americas Inc. 2008, 2009. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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