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KAD5512P_09 PDF预览

KAD5512P_09

更新时间: 2024-11-07 05:40:39
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
32页 637K
描述
Low Power 12-Bit, 250/210/170/125MSPS ADC

KAD5512P_09 数据手册

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KAD5512P  
®
Data Sheet  
March 4, 2009  
FN6807.2  
Low Power 12-Bit, 250/210/170/125MSPS  
ADC  
Features  
• Pin-Compatible with the KAD5512HP Family, Operating at  
Half the Power  
The KAD5512P is the low-power member of the KAD5512  
family of 12-bit analog-to-digital converters. Designed with  
Intersil’s proprietary FemtoCharge™ technology on a  
standard CMOS process, the family supports sampling rates  
of up to 250MSPS. The KAD5512P is part of a  
• Programmable Gain, Offset and Skew Control  
• 1.3GHz Analog Input Bandwidth  
• 60fs Clock Jitter  
pin-compatible portfolio of 10, 12 and 14-bit A/Ds with  
sample rates ranging from 125MSPS to 500MSPS.  
• Over-Range Indicator  
• Selectable Clock Divider: ÷1, ÷2 or ÷4  
• Clock Phase Selection  
A serial peripheral interface (SPI) port allows for extensive  
configurability, as well as fine control of various parameters  
such as gain and offset.  
• Nap and Sleep Modes  
Digital output data is presented in selectable LVDS or CMOS  
formats. The KAD5512P is available in 72- and 48-contact  
QFN packages with an exposed paddle. Operating from a  
1.8V supply, performance is specified over the full industrial  
temperature range (-40°C to +85°C).  
• Two’s Complement, Gray Code or Binary Data Format  
• SDR/DDR LVDS-Compatible or LVCMOS Outputs  
• Programmable Built-in Test Patterns  
• Single-Supply 1.8V Operation  
• Pb-Free (RoHS Compliant)  
Key Specifications  
• SNR = 66.1dBFS for f = 105MHz (-1dBFS)  
IN  
Applications  
• SFDR = 87dBc for f = 105MHz (-1dBFS)  
IN  
• Power Amplifier Linearization  
• Radar and Satellite Antenna Array Processing  
• Broadband Communications  
Total Power Consumption  
- 267/219mW @ 250/125MSPS (SDR Mode)  
- 234/189mW @ 250/125MSPS (DDR Mode)  
• High-Performance Data Acquisition  
• Communications Test Equipment  
• WiMAX and Microwave Receivers  
CLKP  
CLKOUTP  
CLKOUTN  
CLOCK  
GENERATION  
CLKN  
Pin-Compatible Family  
SPEED  
MODEL  
KAD5514P-25  
RESOLUTION  
(MSPS)  
D[11:0]P  
D[11:0]N  
VINP  
VINN  
12-BIT  
250 MSPS  
ADC  
14  
14  
14  
14  
12  
12  
250  
DIGITAL  
ERROR  
CORRECTION  
SHA  
ORP  
ORN  
KAD5514P-21  
KAD5514P-17  
KAD5514P-12  
KAD5512P-50  
210  
170  
VCM  
LVDS/CMOS  
DRIVERS  
+
OUTFMT  
1.25V  
SPI  
CONTROL  
125  
OUTMODE  
500  
KAD5512P-25,  
KAD5512HP-25  
250  
KAD5512P-21,  
KAD5512HP-21  
12  
12  
12  
10  
210  
170  
125  
500  
KAD5512P-17,  
KAD5512HP-17  
KAD5512P-12,  
KAD5512HP-12  
KAD5510P-50  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
FemtoCharge is a trademark of Kenet Inc. Copyright Intersil Americas Inc. 2008, 2009. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
1

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