Datasheet > KAD5514P-17

KAD5514P-17

更新时间： 2024-11-26 14:57:27

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
44页	830K
描述
14-Bit, 170MSPS Single-Channel ADC with LVDS/LVCMOS Outputs

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KAD5514P-17 数据手册

Datasheet

KAD5514P

14-Bit, 250/210/170/125MSPS ADC

The KAD5514P (KAD5514P-12, KAD5514P-17,

KAD5514P-21, KAD5514P-25) is a family of

Features

• Programmable gain, offset, and skew control

• 950MHz analog input bandwidth

• 60fs clock jitter

low-power, high performance 14-bit, analog-to-digital

converters. The family is designed with the proprietary

FemtoCharge™ technology on a standard CMOS

process, and supports sampling rates of up to

250MSPS. The KAD5514P is part of a pin-compatible

portfolio of 10, 12, and 14-bit ADCs with sample rates

ranging from 125MSPS to 500MSPS.

• Over-range indicator

• Selectable clock divider: ÷1, ÷2, or ÷4

• Clock phase selection

A Serial Peripheral Interface (SPI) port allows for

extensive configurability and fine control of various

parameters such as gain and offset.

• Nap and sleep modes

• Two’s complement, gray code or binary data format

• DDR LVDS-compatible or LVCMOS outputs

• Programmable built-in test patterns

• Single-supply 1.8V operation

• Pb-free (RoHS compliant)

Digital output data is presented in selectable LVDS or

CMOS formats. The KAD5514P is available in 72 Ld

and 48 Ld QFN packages with an exposed paddle.

The devices operate from a 1.8V supply, and

performance is specified across the full industrial

temperature range (-40°C to +85°C).

Key Specifications

Applications

• SNR = 69.4dBFS for f = 105MHz (-1dBFS)

• Power amplifier linearization

• Radar and satellite antenna array processing

• Broadband communications

• High-performance data acquisition

• Communications test equipment

• WiMAX and microwave receivers

• SFDR = 82.2dBc for f = 105MHz (-1dBFS)

• Total power consumption

○ 429/345mW at 250/125MSPS (SDR Mode)

○ 390/309mW at 250/125MSPS (DDR Mode)

Related Literature

For a full list of related documents, visit our website:

• KAD5514P-12, KAD5514P-17, KAD5514P-21,

KAD5514P-25 device pages

CLKP

CLKOUTP

CLKOUTN

Clock

Generation

CLKN

D[13:0]P

VINP

VINN

14-Bit

250 MSPS

ADC

D[13:0]N

Digital

Error

Correction

SHA

ORP

ORN

VCM

LVDS/CMOS

Drivers

–

OUTFMT

1.25V

SPI

Control

OUTMODE

Figure 1. Block Diagram

FN6804 Rev.4.00

Jun.17.19

Page 1 of 44

12 3 4 5 6 7...44

中文翻译

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与KAD5514P-17相关器件

型号	品牌	获取价格	描述	数据表
KAD5514P-17Q48	INTERSIL	获取价格	14-Bit, 250/210/170/125MSPS ADC
KAD5514P-17Q72	INTERSIL	获取价格	14-Bit, 250/210/170/125MSPS ADC
KAD5514P-21	INTERSIL	获取价格	Providing high-performance solutions for every link in the signal chain
KAD5514P-21	RENESAS	获取价格	14-Bit, 210MSPS Single-Channel ADC with LVDS/LVCMOS Outputs
KAD5514P-21Q48	INTERSIL	获取价格	14-Bit, 250/210/170/125MSPS ADC
KAD5514P-21Q72	INTERSIL	获取价格	14-Bit, 250/210/170/125MSPS ADC
KAD5514P-25	INTERSIL	获取价格	Providing high-performance solutions for every link in the signal chain
KAD5514P-25	RENESAS	获取价格	14-Bit, 250MSPS Single-Channel ADC with LVDS/LVCMOS Outputs
KAD5514P-25Q48	INTERSIL	获取价格	14-Bit, 250/210/170/125MSPS ADC
KAD5514P-25Q72	INTERSIL	获取价格	14-Bit, 250/210/170/125MSPS ADC

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