Datasheet > KAD5512P-21

KAD5512P-21

更新时间： 2023-12-20 18:44:45

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
36页	1796K
描述
12-Bit, 210MSPS Single-Channel ADC with LVDS/LVCMOS Outputs

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KAD5512P-21 数据手册

DATASHEET

KAD5512P

Low Power 12-Bit, 250/210/170/125MSPS ADC

FN6807

Rev 5.00

May 31, 2016

The KAD5512P is the low-power member of the KAD5512

family of 12-bit analog-to-digital converters. Designed with

Intersil’s proprietary FemtoCharge™ technology on a standard

CMOS process, the family supports sampling rates of up to

250MSPS. The KAD5512P is part of a pin-compatible portfolio

of 10, 12 and 14-bit A/Ds with sample rates ranging from

125MSPS to 500MSPS.

Features

• Half the power of the pin-compatible KAD5512HP family

• 1.5GHz analog input bandwidth

• 60fs clock jitter

• Programmable gain, offset and skew control

• Over-range indicator

A Serial Peripheral Interface (SPI) port allows for extensive

configurability, as well as fine control of various parameters

such as gain and offset.

• Selectable clock divider: ÷1, ÷2 or ÷4

• Clock phase selection

Digital output data is presented in selectable LVDS or CMOS

formats. The KAD5512P is available in 72 Ld and 48 Ld QFN

packages with an exposed paddle. Operating from a 1.8V

supply, performance is specified over the full industrial

temperature range (-40°C to +85°C).

• Nap and sleep modes

• Two’s complement, gray code or binary data format

• SDR/DDR LVDS-compatible or LVCMOS outputs

• Programmable built-in test patterns

• Single-supply 1.8V operation

Key Specifications

• Pb-free (RoHS compliant)

• SNR = 66.1dBFS for f = 105MHz (-1dBFS)

Applications

• Power amplifier linearization

• SFDR = 87dBc for f = 105MHz (-1dBFS)

• Total Power Consumption

- 267/219mW at 250/125MSPS (SDR Mode)

- 234/189mW at 250/125MSPS (DDR Mode)

• Radar and satellite antenna array processing

• Broadband communications

• High-performance data acquisition

• Communications test equipment

• WiMAX and microwave receivers

Related Literature

• KAD5512P-50 Datasheet

• KAD5512HP, Datasheet

AIN = -1.0dBFS

SNR = 66.0dBFS

-20 SFDR = 86.5dBc

SINAD = 65.9dBFS

CLKP

CLKOUTP

CLKOUTN

CLOCK

GENERATION

CLKN

-40

D[11:0]P

D[11:0]N

VINP

VINN

12-BIT

250 MSPS

ADC

DIGITAL

ERROR

CORRECTION

-60

SHA

ORP

ORN

-80

VCM

LVDS/CMOS

DRIVERS

–

OUTFMT

1.25V

SPI

CONTROL

OUTMODE

-100

-120

100

120

FREQUENCY (MHz)

FIGURE 2. SINGLE-TONE SPECTRUM AT 105MHz (250MSPS)

FIGURE 1. BLOCK DIAGRAM

FN6807 Rev 5.00

May 31, 2016

Page 1 of 36

12 3 4 5 6 7...36

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