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K9W8G08U1M-PIB0 PDF预览

K9W8G08U1M-PIB0

更新时间: 2024-11-21 14:51:51
品牌 Logo 应用领域
三星 - SAMSUNG 光电二极管内存集成电路
页数 文件大小 规格书
38页 741K
描述
Flash, 1GX8, PDSO48,

K9W8G08U1M-PIB0 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:TSSOP, TSSOP48,.8,20
Reach Compliance Code:compliant风险等级:5.83
命令用户界面:YES数据轮询:NO
JESD-30 代码:R-PDSO-G48JESD-609代码:e6
内存密度:8589934592 bit内存集成电路类型:FLASH
内存宽度:8湿度敏感等级:3
部门数/规模:8K端子数量:48
字数:1073741824 words字数代码:1000000000
最高工作温度:85 °C最低工作温度:-40 °C
组织:1GX8封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
页面大小:2K words并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not Qualified就绪/忙碌:YES
部门规模:128K最大待机电流:0.0001 A
子类别:Flash Memories最大压摆率:0.03 mA
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Bismuth (Sn/Bi)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
切换位:NO类型:NAND TYPE
Base Number Matches:1

K9W8G08U1M-PIB0 数据手册

 浏览型号K9W8G08U1M-PIB0的Datasheet PDF文件第2页浏览型号K9W8G08U1M-PIB0的Datasheet PDF文件第3页浏览型号K9W8G08U1M-PIB0的Datasheet PDF文件第4页浏览型号K9W8G08U1M-PIB0的Datasheet PDF文件第5页浏览型号K9W8G08U1M-PIB0的Datasheet PDF文件第6页浏览型号K9W8G08U1M-PIB0的Datasheet PDF文件第7页 
K9W8G08U1M  
K9K4G08U0M  
FLASH MEMORY  
Document Title  
512M x 8 Bit / 1G x 8 Bit NAND Flash Memory  
Revision History  
Revision No History  
Draft Date  
Feb. 19. 2003  
Mar. 31. 2003  
Apr. 9. 2003  
Remark  
Advance  
0.0  
0.1  
0.2  
1. Initial issue  
1. Add two-K9K4GXXU0M-YCB0/YIB0 Stacked Package  
Preliminary  
Preliminary  
1. The 3rd Byte ID after 90h ID read command is don’t cared.  
The 5th Byte ID after 90h ID read command is deleted.  
0.3  
1. The K9W8G16U1M-YCB0,YIB0,PCB0,PIB0 is deleted in line up.  
2. Note is added.  
Apr. 30. 2003  
Preliminary  
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for  
durations of 20 ns or less.)  
3. Pb-free Package is added.  
K9K4G08Q0M-PCB0,PIB0  
K9K4G08U0M-PCB0,PIB0  
K9K4G16U0M-PCB0,PIB0  
K9K4G16Q0M-PCB0,PIB0  
K9W8G08U1M-PCB0,PIB0  
Preliminary  
Preliminary  
0.4  
0.5  
1. Added Addressing method for program operation.  
Jan. 27. 2004  
May.31. 2004  
1. The tADL(Address to Data Loading Time) is added.  
- tADL Minimum 100ns  
- tADL is the time from the WE rising edge of final address cycle  
to the WE rising edge of first data cycle at program operation.  
2. Added addressing method for program operation  
3. PKG(TSOP1) Dimension Change  
Preliminary  
Preliminary  
0.6  
1. Technical note is changed  
Feb. 01. 2005  
2. Notes of AC timing characteristics are added  
3. The description of Copy-back program is changed  
4. 1.8V part is deleted  
0.7  
0.8  
1. CE access time : 23ns->35ns (p.11)  
Feb. 14. 2005  
May 4. 2005  
1. The value of tREA is changed.(18ns->20ns)  
2. The value of output load capacitance is changed.  
3. EDO mode is added.  
0.9  
1. The flow chart to creat the initial invalid block table is changed.  
May 6. 2005  
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right  
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have  
any questions, please contact the SAMSUNG branch office near your office.  
1

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