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K50-3C0-SE

更新时间： 2024-09-17 02:59:07
品牌 Logo 应用领域
京瓷/艾维克斯 - KYOCERA AVX 振荡器晶体振荡器时钟
页数 文件大小 规格书
7页 219K
描述
Clock Crystal Oscillators Surface Mount Type

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中文翻译

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K50-3C0-SE 数据手册

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Clock Crystal Oscillators  
Surface Mount Type  
K50H-3C Series  
CMOS / 3.3V / 7.0×5.0A  
Features  
How to Order  
• Miniature ceramic package  
K50H-3C 0 - S E 125.000  
• Highly reliable with seam welding  
• CMOS output  
q
w e r  
t
• Supply voltage VDD=3.3V  
• Internal Bypass Capacitor  
• Low Jitter  
qType(7×5 SMD, 3.3V)  
wFrequency Stability Code(See Table1)  
eDuty Ratio(S: 45% to 55% STD)  
rEnable/Disable Function(STD)  
• ± 25ppm available  
Table 1  
tOscillation Frequency(Ex.: 125.000MHz)  
Stability  
Code (ppm)  
T
OPR  
Packaging(Tape & Reel 1,000pcs/reel)  
Note  
(°C)  
0
S
U
F
±
±
±
50  
30  
25  
Standard specifications  
−10 to +70  
Pb Free  
RoHS Conforming  
With only certain  
frequencies  
(Standard)  
± 100  
50  
With only certain  
frequencies  
−40 to +85  
(Extend)  
G
±
Specifications  
Item  
Symbol  
Conditions  
Min.  
50  
Max.  
170  
+25  
+30  
+50  
+125  
+70  
+85  
7.0  
Units  
MHz  
FOUT  
Output Frequency Range  
Overall conditions:  
−25  
−30  
−50  
−55  
−10  
−40  
−0.5  
2.97  
3.14  
-----  
initial tolerance, operating temperature range, rated  
power supply voltage change, load change, aging(1year  
@25°C), shock and vibration  
F
SBY  
STG  
ppm  
°C  
Frequency Stability  
T
Storage Temperature Range  
Operating Temperature Range  
Standard  
Extend(option)  
TOPR  
-----  
Max. Supply Voltage  
Supply Voltage  
Stability: ± 50ppm, ± 100ppm(Ext Temp)  
Stability: ± 25ppm, ± 30ppm, ± 50ppm(Ext Temp)  
50≤FOUT≤ 8 5 M H z  
3.63  
3.46  
3 0  
Volt  
V
DD  
85<FOUT≤1 0 0 M H z  
100<FOUT≤1 3 5 M H z  
-----  
-----  
4 0  
5 0  
Current Consumption  
(Maximum Loaded)  
IDD  
mA  
135<FOUT≤1 6 0 M H z  
Standby Function  
-----  
-----  
6 0  
1 0  
IST  
µA  
Duty Ratio(Symmetry)  
Duty Ratio(Symmetry)  
SYM  
@50% VDD  
45  
-----  
-----  
-----  
55  
3 . 5  
5 . 0  
1 . 5  
%
20% VDD to 80% VDD  
50≤FOUT<100MHz  
10% VDD to 90% VDD  
Rise/Fall Time  
Tr/Tf  
nS  
20% VDD to 80% VDD  
100≤FOUT≤160MHz  
(10% VDD to 90% VDD Maximum Loaded)  
10% VDD to 90% VDD  
-----  
2 . 0  
V
OL  
-----  
1 0 % V DD  
-----  
1 5  
Output Voltage-"L"  
Output Voltage-"H"  
Output Load  
Volt  
V
OH  
90% VDD  
-----  
CL  
CMOS  
p F  
VIN  
0
-----  
VDD  
3 0 % V DD  
-----  
5
1 5 0  
1 0  
Volt  
Input Voltage Range  
Input Voltage-"L"  
Input Voltage-"H"  
Output Disable Time  
Output Enable Time  
Start-up Time  
V
IL  
Volt  
V
IH  
70% VDD  
-----  
-----  
-----  
ST  
m S  
n S  
m S  
-----  
-----  
@Minimum operating Voltage to be 0sec.  
DJ  
1sigma  
-----  
-----  
2
4
Deterministic Jitter pk-pk  
1Sigma jitter  
Measured with "Wavecrest DTS-2079", VISI 6.3.1  
psec  
Note: Please contact us for inquires about extended operating temperature range, available frequencies and other conditions.  
All electrical characteristics are defined at the maximum load and operating temperature range.  
Dimensions  
Recommended Land Pattern  
(Unit : mm)  
(Unit : mm)  
7.0  
1.4  
0.6  
5.08  
e
w
r
q
Plating: Ni+Au  
Tolerance: ± 0.2  
1.8  
5.08  
Pin Connections  
Enable/Disable Function  
q
w
e
r
Control  
Case GND  
Output  
VDD  
Pin1  
Open  
"H" Level  
Pin3(Output)  
Active  
Active  
Note: K50H Series has Bypass Capacitor of 0.01µF  
between VDD and GND.  
"L" Level High Z(No-Oscillation)  
1234567

中文翻译

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