Datasheet > K4S51323LF-ML75

K4S51323LF-ML75

更新时间： 2023-02-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器
页数	文件大小	规格书
12页	144K
描述
Synchronous DRAM, 16MX32, 5.4ns, CMOS, PBGA90

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数据手册

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K4S51323LF-ML75 数据手册

K4S51323LF - M(E)C/L/F

Mobile SDRAM

DC CHARACTERISTICS

Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 70°C)

Version

Parameter

Symbol

Test Condition

Unit Note

-75

-1H

-1L

Burst length = 1

tRC ≥ tRC(min)

IO = 0 mA

Operating Current

(One Bank Active)

ICC1

120

110

ICC2P CKE ≤ VIL(max), tCC = 10ns

1.0

Precharge Standby Current in

power-down mode

ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns

ICC2N

Input signals are changed one time during 20ns

Precharge Standby Current

in non power-down mode

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

ICC2NS

Input signals are stable

ICC3P CKE ≤ VIL(max), tCC = 10ns

Active Standby Current

in power-down mode

ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns

ICC3N

Active Standby Current

in non power-down mode

(One Bank Active)

Input signals are changed one time during 20ns

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

ICC3NS

Input signals are stable

IO = 0 mA

Operating Current

(Burst Mode)

Page burst

4Banks Activated

tCCD = 2CLKs

ICC4

170

300

150

240

Refresh Current

ICC5

ICC6

tRC ≥ tRC(min)

280

1500

1200

°C

-C

-L

Internal TCSR

Full Array

1/2 of Full Array

1/4 of Full Array

Max 40

900

Max 70

1200

900

Self Refresh Current

CKE ≤ 0.2V

-F

800

700

800

NOTES:

1. Measured with outputs open.

2. Refresh period is 64ms.

3. Internal TCSR can be supported(In commercial Temp : Max 40°C/Max 70°C).

4. K4S51323LF-M(E)C**

5. K4S51323LF-M(E)L**

6. K4S51323LF-M(E)F**

7. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).

September 2004

1 2 3 456 7 8...12

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