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K4E660411D-TC50T PDF预览

K4E660411D-TC50T

更新时间: 2024-01-02 04:14:43
品牌 Logo 应用领域
三星 - SAMSUNG 存储内存集成电路光电二极管动态存储器
页数 文件大小 规格书
21页 412K
描述
EDO DRAM, 16MX4, 50ns, CMOS, PDSO32

K4E660411D-TC50T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:TSOP, TSOP32,.46Reach Compliance Code:unknown
风险等级:5.92最长访问时间:50 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
JESD-609代码:e0内存密度:67108864 bit
内存集成电路类型:EDO DRAM内存宽度:4
端子数量:32字数:16777216 words
字数代码:16000000最高工作温度:70 °C
最低工作温度:组织:16MX4
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP封装等效代码:TSOP32,.46
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
电源:5 V认证状态:Not Qualified
刷新周期:8192自我刷新:NO
最大待机电流:0.001 A子类别:DRAMs
最大压摆率:0.12 mA标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

K4E660411D-TC50T 数据手册

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K4E660411D,K4E640411D  
CMOS DRAM  
16M x 4bit CMOS Dynamic RAM with Extended Data Out  
DESCRIPTION  
This is a family of 16,777,216 x 4 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random  
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time ( -50, or -60), package type (SOJ or TSOP-  
II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.  
This 16Mx4 EDO Mode DRAM family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power  
consumption and high reliability.  
FEATURES  
• Extended Data Out Mode operation  
• Part Identification  
• CAS-before-RAS refresh capability  
• RAS-only and Hidden refresh capability  
• Fast parallel test mode capability  
• TTL(5.0V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
- K4E660411D-JC(5.0V, 8K Ref., SOJ)  
- K4E640411D-JC(5.0V, 4K Ref., SOJ)  
- K4E660411D-TC(5.0V, 8K Ref., TSOP)  
- K4E640411D-TC(5.0V, 4K Ref., TSOP)  
Active Power Dissipation  
• Available in Plastic SOJ and TSOP(II) packages  
• +5.0V±10% power supply  
Unit : mW  
4K  
Speed  
-50  
8K  
495  
440  
660  
605  
-60  
Refresh Cycles  
Part  
NO.  
Refresh  
cycle  
Refresh time  
Normal  
FUNCTIONAL BLOCK DIAGRAM  
K4E660411D*  
K4E640411D  
8K  
4K  
64ms  
RAS  
CAS  
W
Vcc  
Vss  
Control  
Clocks  
VBB Generator  
* Access mode & RAS only refresh mode  
: 8K cycle/64ms  
CAS-before-RAS & Hidden refresh mode  
: 4K cycle/64ms  
Row Decoder  
Refresh Timer  
Data in  
Buffer  
Refresh Control  
Refresh Counter  
Memory Array  
16,777,216 x 4  
Cells  
DQ0  
to  
DQ3  
Performance Range  
Speed  
Data out  
Buffer  
Row Address Buffer  
Col. Address Buffer  
tRAC  
50ns  
60ns  
tCAC  
13ns  
15ns  
tRC  
tPC  
A0~A12  
(A0~A11)*1  
OE  
-50  
-60  
84ns  
104ns  
20ns  
25ns  
A0~A10  
(A0~A11)*1  
Column Decoder  
Note) *1 : 4K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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