Datasheet > K3N5V1000D-DC120

K3N5V1000D-DC120

更新时间： 2023-07-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		有原始数据的样本ROM 光电二极管
页数	文件大小	规格书
4页	98K
描述
MASK ROM, 1MX16, 120ns, CMOS, PDIP42, 0.600 INCH, DIP-42

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K3N5V1000D-DC120 数据手册

K3N5V(U)1000D-D(G)C

CMOS MASK ROM

16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM

FEATURES

GENERAL DESCRIPTION

· Switchable organization

The K3N5V(U)1000D-D(G)C is a fully static mask programma-

ble ROM fabricated using silicon gate CMOS process technol-

ogy, and is organized either as 2,097,152 x 8 bit(byte mode) or

as 1,048,576x16 bit(word mode) depending on BHE voltage

level.(See mode selection table)

2,097,152 x 8(byte mode)

1,048,576 x 16(word mode)

· Fast access time : 100ns(Max.)

· Supply voltage : single +3.0V/ single +3.3V

· Current consumption

Operating : 40mA(Max.)

Standby : 30mA(Max.)

· Fully static operation

· All inputs and outputs TTL compatible

· Three state outputs

This device operates with 3.0V or 3.3V power supply, and all

inputs and outputs are TTL compatible.

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

· Package

-. K3N5V(U)1000D-DC : 42-DIP-600

-. K3N5V(U)1000D-GC : 44-SOP-600

The K3N5V(U)1000D-DC is packaged in a 42-DIP and the

K3N5V(U)1000D-GC in a 44-SOP.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

A19

MEMORY CELL

MATRIX

(1,048,576x16/

2,097,152x8)

A18

A19

N.C

A18

A17

N.C

A19

BUFFERS

AND

DECODER

A17

40 A9

39 A10

A11

A10

A11

A12

A13

SENSE AMP.

A14

37 A13

BUFFERS

AND

DECODER

A15

A14

DATA OUT

BUFFERS

A16

A15

VSS

BHE

VSS

A16

DIP

SOP

BHE

VSS

A-1

^Q15/A-1VSS

Q15/A-1

Q14

Q13

Q14

Q⁹17

Q0/Q8

Q7/Q15

CONTROL

LOGIC

Q12

Q13

Q10

Q2 19

BHE

23 Q4

Q10 20

25 Q12

Q11

VCC

Q11

VCC

Pin Name

A0 - A19

Pin Function

Address Inputs

K3N5V(U)1000D-DC

Q0 - Q14

Data Outputs

K3N5V(U)1000D-GC

Output 15(Word mode)/

LSB Address(Byte mode)

Q15 /A-1

BHE

Word/Byte selection

Chip Enable

Output Enable

Power

VCC

VSS

N.C

Ground

No Connection

12 3 4

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与K3N5V1000D-DC120相关器件

型号	品牌	描述	获取价格	数据表
K3N5V1000D-DC15	SAMSUNG	MASK ROM, 1MX16, 150ns, CMOS, PDIP42, 0.600 INCH, DIP-42	获取价格
K3N5V1000D-DC150	SAMSUNG	MASK ROM, 1MX16, 150ns, CMOS, PDIP42, 0.600 INCH, DIP-42	获取价格
K3N5V1000D-GC100	SAMSUNG	MASK ROM, 1MX16, 100ns, CMOS, PDSO44, 0.600 INCH, SOP-44	获取价格
K3N5V1000D-GC12	SAMSUNG	MASK ROM, 1MX16, 120ns, CMOS, PDSO44, 0.600 INCH, SOP-44	获取价格
K3N5V1000D-GC120	SAMSUNG	MASK ROM, 1MX16, 120ns, CMOS, PDSO44, 0.600 INCH, SOP-44	获取价格
K3N5V1000D-GC15	SAMSUNG	MASK ROM, 1MX16, 150ns, CMOS, PDSO44, 0.600 INCH, SOP-44	获取价格