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K3N4C1000D-DC PDF预览

K3N4C1000D-DC

更新时间: 2024-11-18 21:11:27
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM
页数 文件大小 规格书
4页 98K
描述
MASK ROM

K3N4C1000D-DC 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

K3N4C1000D-DC 数据手册

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K3N4C1000D-D(G)C  
CMOS MASK ROM  
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
1,048,576 x 8(byte mode)  
524,288 x 16(word mode)  
· Fast access time : 100ns(Max.)  
· Supply voltage : single +5V  
· Current consumption  
The K3N4C1000D-D(G)C is a fully static mask programmable  
ROM fabricated using silicon gate CMOS process technology,  
and is organized either as 1,048,576 x 8 bit(byte mode) or as  
524,288 x16 bit(word mode) depending on BHE voltage level.  
(See mode selection table)  
This device operates with a 5V single power supply, and all  
inputs and outputs are TTL compatible.  
Operating : 50mA(Max.)  
Standby : 50mA(Max.)  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
· Package  
-. K3N4C1000D-DC : 42-DIP-600  
-. K3N4C1000D-GC : 44-SOP-600  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
The K3N4C1000D-DC is packaged in a 42-DIP and the  
K3N4C1000D-GC in a 44-SOP.  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A18  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(524,288x16/  
1,048,576x8)  
A18  
A17  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
CE  
1
2
42 N.C  
N.C  
N.C  
A8  
N.C  
A18  
A17  
A7  
1
2
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
DECODER  
A8  
41  
3
40 A9  
3
4
A10  
39  
38  
A9  
4
5
A11  
A6  
A10  
A11  
A12  
A13  
A14  
A15  
A16  
BHE  
VSS  
Q15/A-1  
Q7  
5
Y
SENSE AMP.  
6
37 A12  
36  
A5  
6
BUFFERS  
AND  
7
A13  
35 A14  
A4  
7
DATA OUT  
BUFFERS  
8
A3  
8
DECODER  
A0  
9
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
A15  
A2  
9
10  
11  
A16  
A-1  
A1  
10  
11  
12  
13  
14  
15  
16  
17  
18  
BHE  
VSS  
Q15/A-1  
Q7  
A0  
DIP  
. . .  
VSS 12  
SOP  
CE  
VSS  
OE  
Q0  
OE  
Q0  
Q8  
13  
14  
15  
CE  
Q0/Q8  
Q7/Q15  
Q14  
Q6  
CONTROL  
LOGIC  
OE  
Q1 16  
Q8  
Q14  
Q6  
Q9  
Q2  
17  
18  
19  
Q13  
Q5  
BHE  
Q1  
Q9  
Q13  
Q10  
Q12  
Q4  
Q2 19  
26 Q5  
Q12  
Q3 20  
Q11  
Q10 20  
25  
24 Q4  
VCC  
Pin Name  
A0 - A18  
Pin Function  
21  
VCC  
Q3  
21  
Address Inputs  
Data Outputs  
Q11  
22  
23  
Q0 - Q14  
K3N4C1000D-DC  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
K3N4C1000D-GC  
BHE  
CE  
Word/Byte selection  
Chip Enable  
OE  
Output Enable  
Power ( +5V)  
Ground  
VCC  
VSS  
N.C  
No Connection  

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