Datasheet > JANTX2N6990U

JANTX2N6990U

更新时间： 2024-11-04 00:00:03

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JANTX2N6990U 数据手册

INCH-POUND

The documentation and process conversion measures necessary to comply

with this document shall be completed by 9 October 2002.

MIL-PRF-19500/559E

9 July 2002

SUPERSEDING

MIL-PRF-19500/559D

10 August 1998

PERFORMANCE SPECIFICATION

SEMICONDUCTOR DEVICE, UNITIZED, NPN, SILICON, SWITCHING,

FOUR TRANSISTOR ARRAY TYPES 2N6989, 2N6989U, AND 2N6990,

JAN, JANTX, JANTXV, AND JANS

This specification is approved for use by all Departments

and Agencies of the Department of Defense.

1. SCOPE

1.1 Scope. This specification covers the performance requirements for NPN, silicon, switching transistors in a

four independent chip array. Four levels of product assurance are provided for each device type as specified in

MIL-PRF-19500.

1.2 Physical dimensions. See figures 1, 2, 3, 4 (14 pin dual-in-line, 14 pin flat package), and figure 5 (20 pin

surface mount).

1.3 Maximum ratings. (1)

Type

P_T

V_CBO

(3)

V_EBO(3)

V_CEO(3)

I_C(3)

mA dc

T_OPand T_STG

T_A= +25°C (2)

V dc

°C

*2N6989

2N6989U

*2N6990

2.0

1.0

800

-65 to +200

(1) Maximum voltage between transistors shall be ≥ 500 V dc.

(2) Derate linearly 11.43 mW/°C above T_A= +25°C for 2N6989 and 2N6989U. Derate linearly 5.71 mW/°C

above T_A= +25°C for 2N6990. Ratings apply to total package.

(3) Ratings apply to each transistor in the array.

Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in

improving this document should be addressed to: Defense Supply Center, Columbus, ATTN: DSCC-VAC,

P.O. Box 3990, Columbus, OH 43216-5000, by using the Standardization Document Improvement Proposal (DD

Form 1426) appearing at the end of this document or by letter.

AMSC N/A

FSC 5961

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

12 3 4 5 6 7...19

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