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IWR6843AOP

更新时间: 2024-09-18 02:50:55
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德州仪器 - TI /
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83页 3560K
描述
IWR6843AOP Single-Chip 60- to 64-GHz mmWave Sensor Antennas-On-Package (AOP)

IWR6843AOP 数据手册

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IWR6843AOP
SWRS237A – APRIL 2020 – REVISED APRIL 2021  
IWR6843AOP Single-Chip 60- to 64-GHz mmWave Sensor  
Antennas-On-Package (AOP)  
– Hardware integrity up to SIL-2 targeted  
1 Features  
– Safety-related certification IEC 61508  
certification by TUV Sud planned  
Power management  
– Built-in LDO network for enhanced PSRR  
– I/Os support dual voltage 3.3 V/1.8 V  
Clock source  
FMCW transceiver  
– Integrated 4 receivers and 3 transmitters  
Antennas-On-Package (AOP)  
– Integrated PLL, transmitter, receiver, Baseband,  
and ADC  
– 60- to 64-GHz coverage with 4-GHz continuous  
bandwidth  
– Supports 6-bit phase shifter for TX Beam  
forming  
– 40.0 MHz crystal with internal oscillator  
– Supports external oscillator at 40 MHz  
– Supports externally driven clock (square/sine)  
at 40 MHz  
– Ultra-accurate chirp engine based on fractional-  
N PLL  
Built-in calibration and self-test  
– ARM® Cortex®-R4F-based radio control system  
– Built-in firmware (ROM)  
– Self-calibrating system across frequency and  
temperature  
– Embedded self-monitoring with no host  
processor involvement on Functional Safety-  
Compliant targeted devices  
Easy hardware design  
– 0.8-mm pitch, 180-pin 15 mm × 15 mm FCBGA  
package (ALP) for easy assembly and low-cost  
PCB design  
– Small solution size  
Operating conditions:  
– Junction temperature range of –40°C to 105°C  
C674x DSP for advanced signal processing  
Memory compression  
Hardware accelerator for FFT, filtering, and CFAR  
processing  
ARM-R4F microcontroller for object detection, and  
interface control  
– Supports autonomous mode (loading user  
application from QSPI flash memory)  
Internal memory with ECC  
– 1.75 MB, divided into MSS program RAM (512  
KB), MSS data RAM (192 KB), DSP L1 RAM  
(64KB) and L2 RAM (256 KB), and L3 radar  
data cube RAM (768 KB)  
Technical reference manual includes allowed  
size modifications  
Other interfaces available to user application  
– Up to 6 ADC channels (low sample rate  
monitoring)  
– Up to 2 SPI ports  
– Up to 2 UARTs  
– 1 CAN-FD interface  
– I2C  
– GPIOs  
– 2 lane LVDS interface for raw ADC data and  
debug instrumentation  
Functional Safety-Compliant targeted  
– Developed for functional safety applications  
– Documentation will be available to aid IEC  
61508 functional safety system design  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 

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