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IW4040B PDF预览

IW4040B

更新时间: 2024-02-13 02:05:50
品牌 Logo 应用领域
INTEGRAL 计数器
页数 文件大小 规格书
7页 63K
描述
12-Stage Binary Ripple Counter

IW4040B 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.77
Base Number Matches:1

IW4040B 数据手册

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TECHNICAL DATA  
IW4040B  
12-Stage Binary Ripple Counter  
High-Voltage Silicon-Gate CMOS  
N SUFFIX  
PLASTIC DIP  
The IW4040B is ripple-carry binary counter. All counter stages are  
master-slave flip-flops. The state of a counter advances one count on the  
negative transition of each input pulse; a high level on the RESET line resets  
the counter to its all zeros state. Schmitt trigger action on the input-pulse  
line permits unlimited rise and fall times.  
16  
1
·
·
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 mA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
16  
1
·
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
ORDERING INFORMATION  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
IW4040BN Plastic DIP  
IW4040BD SOIC  
IZ4040B  
chip  
TA = -55° to 125° C  
for all packages  
LOGIC DIAGRAM  
9
Q1  
PIN ASSIGNMENT  
7
Q2  
6
V
Q12  
Q6  
1
2
3
4
5
6
7
8
16  
CC  
Q3  
15 Q11  
14 Q10  
5
3
10  
CLOCK  
Q4  
Q5  
Q8  
12 Q9  
Q7  
13  
Q5  
Q6  
Q7  
Q8  
Q4  
2
Q3  
11  
RESET  
4
Q2  
10 CLOCK  
13  
12  
GND  
9
Q1  
Q9  
FUNCTION TABLE  
14  
15  
Q10  
Inputs  
Clock  
Output  
Q11  
Q12  
1
Reset  
Output state  
L
No change  
11  
Advance to next  
state  
L
RESET  
X
H
All Outputs are low  
H= high level  
L = low level  
X=don’t care  
PIN 16 =VCC  
PIN 8 = GND  
INTEGRAL  
1

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