Datasheet > IW4040BD

IW4040BD

更新时间： 2024-11-29 05:39:55

品牌	Logo	应用领域
IKSEMICON		计数器高压栅
页数	文件大小	规格书
6页	237K
描述
12-Stage Binary Ripple Counter High-Voltage Silicon-Gate CMOS

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数据手册

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IW4040BD 数据手册

TECHNICAL DATA

IW4040B

12-Stage Binary Ripple Counter

High-Voltage Silicon-Gate CMOS

The IW4040B is ripple-carry binary counter. All counter stages are master-

slave flip-flops. The state of a counter advances one count on the negative

transition of each input pulse; a high level on the RESET line resets the counter

to its all zeros state. Schmitt trigger action on the input-pulse line permits

unlimited rise and fall times.

N SUFFIX

PLASTIC DIP

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1 μA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

•

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

ORDERING INFORMATION

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

IW4040BN Plastic DIP

IW4040BD SOIC

T_A= -55° to 125° C for all packages

LOGIC DIAGRAM

PIN ASSIGNMENT

Q12

Q11

CLOCK

Q10

RESET

CLOCK

GND

FUNCTION TABLE

Q10

Inputs

Clock

Output

Q11

Q12

Reset

Output state

No change

Advance to next

state

RESET

All Outputs are low

H= high level

L = low level

X=don’t care

PIN 16 =V_CC

PIN 8 = GND

Rev. 00

12 3 4 5 6

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