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ISO7240CFDWRG4 PDF预览

ISO7240CFDWRG4

更新时间: 2024-09-13 04:22:51
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
16页 567K
描述
QUAD DIGITAL ISOLATOR WITH SELECTABLE FAILSAFE OUTPUT

ISO7240CFDWRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.29其他特性:ALSO REQUIRES 4.5V TO 5.5V SUPPLY
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:10.3 mm
湿度敏感等级:3功能数量:4
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:3.6 V最小供电电压:3.15 V
标称供电电压:3.3 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

ISO7240CFDWRG4 数据手册

 浏览型号ISO7240CFDWRG4的Datasheet PDF文件第2页浏览型号ISO7240CFDWRG4的Datasheet PDF文件第3页浏览型号ISO7240CFDWRG4的Datasheet PDF文件第4页浏览型号ISO7240CFDWRG4的Datasheet PDF文件第5页浏览型号ISO7240CFDWRG4的Datasheet PDF文件第6页浏览型号ISO7240CFDWRG4的Datasheet PDF文件第7页 
ISO7240CF  
www.ti.com ................................................................................................................................................ SLLS869BSEPTEMBER 2007REVISED APRIL 2008  
QUAD DIGITAL ISOLATOR WITH SELECTABLE FAILSAFE OUTPUT  
1
FEATURES  
0-Mbps (DC) to 25 Mbps Signaling Rate  
Operates with 3.3-V or 5-V Supplies  
Low Channel-to-Channel Output Skew;  
2 ns Max  
High Electromagnetic Immunity  
(see application note SLLA181)  
Low Pulse-Width Distortion (PWD);  
2.5 ns Max  
–40°C to 125°C Operating Range  
APPLICATIONS  
Typical 25-Year Life at Rated Working Voltage  
(see application note SLLA197 and Figure 11)  
Flat Plasma Display Panels  
Industrial Fieldbus  
Computer Peripheral Interface  
Servo Control Interface  
Data Acquisition  
4000-Vpeak Isolation, 560 Vpeak VIORM  
UL 1577 , IEC 60747-5-2 (VDE 0884, Rev 2),  
IEC 61010-1 and CSA Approved  
4 kV ESD Protection  
DESCRIPTION  
The ISO7240CF is a quad-channel digital isolator with an input disable function and a selectable high or low  
failsafe-output function with the CTRL pin (pin 10). The device has logic input and output buffers separated by  
TI’s silicon dioxide (SiO2) isolation barrier. When used in conjunction with isolated power supplies, the device  
blocks high voltage, isolates grounds, and prevents noise currents from entering the local ground and interfering  
with or damaging sensitive circuitry.  
A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh  
pulse is not received for more than 4 µs, the input is assumed to be unpowered or not being actively driven, and  
the failsafe circuit drives the output to the logic state selected by the user.  
The failsafe-output is a logic high when a logic-high is placed on the CTRL pin or it is left unconnected. If a  
logic-low signal is applied to the CTRL pin, the failsafe-output becomes a logic-low output state.  
The ISO7240CF also includes an input disable function that prevents data from being passed across the isolation  
barrier to the output. When the inputs are disabled, the outputs are set by the CTRL pin.  
This device may be powered from either 3.3-V or 5-V supplies on either side in any combination. Note that the  
signal input pins are 5-V tolerant regardless of the voltage supply level being used.  
The device is characterized for operation over the ambient temperature range of –40°C to 125°C.  
ISO7240CF  
V
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
CC1  
GND1  
GND2  
IN  
A
14  
13  
12  
11  
10  
OUT  
A
IN  
B
OUT  
B
IN  
C
OUT  
C
OUT  
D
IN  
D
CTRL  
GND2  
DISABLE  
GND1  
9
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2007–2008, Texas Instruments Incorporated  

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