ISL73041SEH Datasheet
10. Ordering Information
Radiation Hardness
(Total Ionizing Dose)
Package Description
(RoHS Compliant)
Package
Drawing
Carrier
Type
[1]
Part Number
Temp Range
16 Pad CLCC Packaged
Device (QML-V Level
Screening)
ISL73041SEHML
J16.A
Tray
LDR to 75krad(Si)
Bare Die (QML-V Level
Screening)
[2]
ISL73041SEHMX
N/A
N/A
N/A
N/A
Tray
-55 to +125°C
[2][3]
ISL73041SEHX/SAMPLE
Die
N/A
16 Pad CLCC Packaged
Device
[3]
ISL73041SEHL/PROTO
J16.A
[4]
ISL73041SEHEV1Z
ISL73041SEH Evaluation Board
[4]
ISL73847SEHEV2Z
ISL73847SEH + ISL73041SEH Evaluation Board
ISL73847SEH + ISL73041SEH Business Card Size Demonstration board with Package GaN
FETs; V = 12V; V = 1V; I = 50A; f = 500kHz;
[4]
ISL73847SEHDEMO2Z
IN
OUT
OUT
SW
1. These Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with
both SnPb and Pb-free soldering operations.
2. Die product tested at TA = + 25°C. The wafer probe test includes functional and parametric testing sufficient to make the die capable of
meeting the electrical performance outlined in Electrical Specifications. The die is sourced from wafer lots that have been qualified for
Group C and Group E per MIL-PRF-38535 (Refer to R34TB0001: Renesas Radiation Hardened QML-V Equivalent Screening and QCI
Flow for more information).
3. The /PROTO and /SAMPLE are not rated or certified for Total Ionizing Dose (TID) or Single Event Effect (SEE) immunity. These parts
are intended for engineering evaluation purposes only. The /PROTO parts meet the electrical limits and conditions across temperature
specified in this datasheet. The /SAMPLE parts are capable of meeting the electrical limits and conditions specified in this datasheet. The
/SAMPLE parts do not receive 100% screening across temperature to the electrical limits. These part types do not come with a Certificate
of Conformance.
4. Evaluation board uses the /PROTO parts and /PROTO parts are not rated or certified for Total Ionizing Dose (TID) or Single Event Effect
(SEE) immunity.
11. Revision History
Rev.
Date
Description
Updated Features bullets.
1.03
Jan 4, 2024
Added Dual Complimentary Low-Side GaN FET Driver section.
Updated Figure 14.
1.02
Jun 22, 2023
Updated Ordering Information table.
R34DS0017EU0103 Rev.1.03
Jan 4, 2024
Page 38