Datasheet > ISL71091SEHF20SAMPLE

ISL71091SEHF20SAMPLE

更新时间： 2024-09-17 21:20:47

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
14页	1353K
描述
THREE TERM VOLTAGE REFERENCE

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技术参数
数据手册

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ISL71091SEHF20SAMPLE 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.68	模拟集成电路 - 其他类型：	THREE TERMINAL VOLTAGE REFERENCE
JESD-609代码：	e3	峰值回流温度（摄氏度）：	NOT SPECIFIED
端子面层：	Matte Tin (Sn)	处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

ISL71091SEHF20SAMPLE 数据手册

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ISL71091SEH20

Ordering Information

V_OUT

OPTION

ORDERING NUMBER

PART

NUMBER

(Note 3) GRADE

TEMPCO

(ppm/°C)

TEMP RANGE

(°C)

PACKAGE

(RoHS Compliant) PKG. DWG. #

(Notes 1, 2)

5962R1420801VXC

5962R1420801V9A

ISL71091SEHF20/PROTO

ISL71091SEHF20SAMPLE

ISL71091SEH20EV1Z

NOTES:

(V)

(%)

ISL71091SEHVF20

2.048

0.05

-55 to +125 8 Ld Flatpack

-55 to +125 Die

K8.A

ISL71091SEHVX20

ISL71091SEHF20/PROTO

ISL71091SEHX20SAMPLE

Evaluation Board

-55 to +125 8 Ld Flatpack

-55 to +125 Die

K8.A

1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both

SnPb and Pb-free soldering operations.

2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in the

“Ordering Information” table must be used when ordering.

3. For alternate V_OUToptions, visit the ISL71090SEH and ISL71091SEH family pages.

Pin Configuration

ISL71091SEH20

(8 LD FLATPACK)

TOP VIEW

DNC

VIN

DNC

COMP

GND

VOUT

TRIM

NOTE: The ESD triangular mark is indicative of pin #1. It is a part of the device marking and is

placed on the lid in the quadrant where pin #1 is located.

Pin Descriptions

PIN NUMBER

PIN NAME

DNC

ESD CIRCUIT

DESCRIPTION

1, 7, 8

Do not connect. Internally terminated.

Input voltage connection.

VIN

COMP

GND

Compensation and noise reduction capacitor.

Ground connection. Also connected to the lid.

Voltage reference trim input.

TRIM

VOUT

Voltage reference output.

VDD

CAPACITIVELY

TRIGGER CLAMP

GND

ESD CIRCUIT 1

ESD CIRCUIT 2

ESD CIRCUIT 3

FN8632.1

July 11, 2014

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