ISL6531
®
Data Sheet
August 11, 2005
FN9053.2
Dual 5V Synchronous Buck Pulse-Width
Modulator (PWM) Controller for DDRAM
Features
• Provides V
channel DDRAM memory systems
, V
, and V voltages for one- and two-
TT
DDQ REF
Memory V
and V Termination
DDQ
TT
The ISL6531 provides complete control and protection for
dual DC-DC converters optimized for high-performance
DDRAM memory applications. It is designed to drive low
cost N-channel MOSFETs in synchronous-rectified buck
• Excellent voltage regulation
- V
- V
= 2.5V ±2% over full operating range
DDQ
1
--
=
±1% over full operating range
⋅ V
REF
DDQ
2
- V = V
TT
± 30mV
REF
topology to efficiently generate 2.5V V
for powering
DDQ
for DDRAM differential signalling,
• Supports ‘S3’ sleep mode
1
DDRAM memory, V
REF
--
and V for signal termination. The ISL6531 integrates all of
- V is held at
via a low power window
DDQ
⋅ V
TT
TT
2
regulator to minimize wake-up time
the control, output adjustment, monitoring and protection
functions into a single package.
• Fast transient response
- Full 0% to 100% duty ratio
The V
DDQ
output of the converter is maintained at 2.5V
through an integrated precision voltage reference. The V
output is precisely regulated to 1/2 the memory power
supply, with a maximum tolerance of ±1% over temperature
REF
• Operates from +5V Input
• V regulator internally compensated
TT
and line voltage variations. V accurately tracks V
.
• Overcurrent fault monitor on VDD
TT REF
During V2_SD sleep mode, the V output is maintained by
a low power window regulator.
TT
- Does not require extra current sensing element
- Uses MOSFET’s r
DS(ON)
The ISL6531 provides simple, single feedback loop, voltage-
• Drives inexpensive N-Channel MOSFETs
mode control with fast transient response for the V
DDQ
• Small converter size
regulator. The V regulator features internal compensation
TT
- 300kHz fixed frequency oscillator
that eases the design. It includes two phase-locked 300kHz
o
triangle-wave oscillators which are displaced 90 to minimize
• 24 Lead, SOIC or 32 Lead, 5mm×5mm QFN
interference between the two PWM regulators. The
regulators feature error amplifiers with a 15MHz gain-
bandwidth product and 6V/µs slew rate which enables high
converter bandwidth for fast transient performance. The
resulting PWM duty ratio ranges from 0% to 100%.
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• V
, V , and VREF regulation for DDRAM memory
DDQ TT
systems
The ISL6531 protects against overcurrent conditions by
inhibiting PWM operation. The ISL6531 monitors the current
- Main memory in AMD® Athlon™ and K8™, Pentium®
III, Pentium IV, Transmeta, PowerPC™, AlphaPC™, and
UltraSparc® based computer systems
in the V
regulator by using the r
of the upper
DDQ
DS(ON)
MOSFET which eliminates the need for a current sensing
resistor.
• High-power tracking DC-DC regulators
Ordering Information
TEMP
o
PART NUMBER RANGE( C)
PACKAGE
PKG. DWG. #
M24.3
ISL6531CB
0 to 70
0 to 70
24 Lead SOIC
ISL6531CBZ
(See Note)
24 Lead SOIC
(Pb-free)
M24.3
ISL6531CR
0 to 70
32 Lead 5x5 QFN L32.5x5
ISL6530/31EVAL1 Evaluation Board
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
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