Datasheet > IS66WVE51216BLL

IS66WVE51216BLL

更新时间： 2022-02-26 11:59:00

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
31页	624K
描述
Asynchronous and page mode interface

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IS66WVE51216BLL 数据手册

IS66WVE51216EALL/BLL/CLL

IS67WVE51216EALL/BLL/CLL

Bus Operating Modes

PSRAM products incorporates the industry-standard, asynchronous interface. This bus interface

supports asynchronous Read and WRITE operations as well as page mode READ operation for

enhanced bandwidth. The supported interface is defined by the value loaded into the CR.

Asynchronous Mode Operation

PSRAM products power up in the asynchronous operating mode. This mode uses the industry-

standard SRAM control interface (CE#, OE#, WE#, and LB#/UB#).

READ operations are initiated by bringing CE#, OE#, and LB#/UB# LOW while keeping WE# HIGH

(see Figure 2). Valid data will be driven out of the I/Os after the specified access time has elapsed.

WRITE operations occur when CE#,WE#, and LB#/UB# are driven LOW (see Figure 3). During

WRITE operations, the level of OE# is a “Don’t Care”; WE# overrides OE#. The data to be written is

latched on the rising edge of CE#, WE#, or LB#/UB#, whichever occurs first. CE# or WE# LOW time

must be limited to tCEM.

Figure 2. Asynchronous Read Operation

tRC = READ cycle Time

VALID

ADDRESS

Address

DQ0-

DQ15

VALID

DATA

CE#

< t_CEM

UB#/LB#

OE#

WE#

www.issi.com - SRAM@issi.com

Rev. 0D | November 2014

1...4 5 678 9 10...31

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型号	品牌	描述	获取价格	数据表
IS66WVE51216CLL	ISSI	Asynchronous and page mode interface	获取价格
IS66WVE51216EALL	ISSI	Asynchronous and page mode interface	获取价格
IS66WVH8M8ALL-166B1LI	ISSI	Pseudo Static RAM, 8MX8, CMOS, PBGA24, 6 X 8 MM, 1.20 MM HEIGHT, LEAD FREE, MO-207, TFBGA-	获取价格
IS66WVH8M8BLL-100B1LI	ISSI	Pseudo Static RAM, 8MX8, CMOS, PBGA24, 6 X 8 MM, 1.20 MM HEIGHT, LEAD FREE, MO-207, TFBGA-	获取价格
IS66WVO16M8EDALL-100BLA2	ISSI	SRAM,	获取价格
IS66WVO16M8EDALL-100BLI	ISSI	SRAM,	获取价格