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IS62WV2568BLL-55TI-TR PDF预览

IS62WV2568BLL-55TI-TR

更新时间: 2024-11-16 18:14:19
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
14页 540K
描述
Standard SRAM, 256KX8, 55ns, CMOS, PDSO32

IS62WV2568BLL-55TI-TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.92
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
端子数量:32字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP32,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:PARALLEL
电源:3/3.3 V认证状态:Not Qualified
最大待机电流:0.00001 A最小待机电流:1 V
子类别:SRAMs最大压摆率:0.035 mA
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
Base Number Matches:1

IS62WV2568BLL-55TI-TR 数据手册

 浏览型号IS62WV2568BLL-55TI-TR的Datasheet PDF文件第2页浏览型号IS62WV2568BLL-55TI-TR的Datasheet PDF文件第3页浏览型号IS62WV2568BLL-55TI-TR的Datasheet PDF文件第4页浏览型号IS62WV2568BLL-55TI-TR的Datasheet PDF文件第5页浏览型号IS62WV2568BLL-55TI-TR的Datasheet PDF文件第6页浏览型号IS62WV2568BLL-55TI-TR的Datasheet PDF文件第7页 
IS62WV2568ALL  
IS62WV2568BLL  
JANUARY 2013  
256K x 8 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
TheꢀISSIꢀIS62WV2568ALLꢀ/ꢀIS62WV2568BLLꢀareꢀꢀhigh-  
speed,ꢀ 2Mꢀ bitꢀ staticꢀ RAMsꢀ organizedꢀ asꢀ 256Kꢀ wordsꢀ  
by8bits.ItisfabricatedusingISSI's high-performance  
CMOStechnology.Thishighlyreliableprocesscoupledꢀ  
with innovative circuit design techniques, yields high-  
performance and low power consumption devices.  
•ꢀ High-speedꢀaccessꢀtime:ꢀꢀ45ns,ꢀ55ns,ꢀ70ns  
•ꢀ CMOSꢀlowꢀpowerꢀoperation  
– 36 mW (typical) operating  
ꢀ –ꢀ9ꢀµWꢀ(typical)ꢀCMOSꢀstandby  
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels  
•ꢀ Singleꢀpowerꢀsupplyꢀꢀ  
When CS1isHIGH(deselected)orwhenCS2isLOW  
(deselected) , the device assumes a standby mode at  
which the power dissipation can be reduced down with  
CMOSꢀinputꢀlevels.  
ꢀ –ꢀ1.65V--2.2VꢀVcc (62WV2568ALL)  
ꢀ –ꢀ2.5V--3.6VꢀVcc (62WV2568BLL)  
Easy memory expansion is provided by using Chip Enable  
andꢀOutputꢀEnableꢀinputs.ꢀTheꢀactiveꢀLOWꢀWriteꢀEnableꢀ  
(WE) controls both writing and reading of the memory.  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefresh  
required  
TheIS62WV2568ALLandIS62WV2568BLLarepackagedꢀ  
intheJEDECstandard32-pinꢀTSOP(TYPEI),sTSOP  
(TYPEꢀI),ꢀandꢀ36-pinꢀminiꢀBGA.  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Industrialꢀtemperatureꢀavailable  
•ꢀ Lead-freeꢀavailableꢀ  
FUNCTIONAL BLOCK DIAGRAM  
256K x 8  
MEMORY ARRAY  
A0-A17  
DECODER  
VCC  
GND  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O0-I/O7  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-  
est version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. I  
1/10/13  

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