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IS61WV12816DBLS-35TLI PDF预览

IS61WV12816DBLS-35TLI

更新时间: 2024-11-25 05:19:27
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器光电二极管
页数 文件大小 规格书
21页 456K
描述
Standard SRAM, 128KX16, 35ns, CMOS, PDSO44, LEAD FREE, PLASTIC, TSOP2-44

IS61WV12816DBLS-35TLI 数据手册

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IS61WV12816DALL/DALS  
IS61WV12816DBLL/DBLS  
IS64WV12816DBLL/DBLS  
128K x 16 HIGH SPEED ASYNCHRONOUS  
CMOS STATIC RAM  
JANUARY 2013  
DESCRIPTION  
FEATURES  
TheISSIIS61WV12816DAxx/DBxxandIS64WV12816D-  
Bxxꢀareꢀhigh-speed,ꢀ2,097,152-bitꢀstaticꢀRAMsꢀorganizedꢀ  
asꢀ131,072ꢀwordsꢀbyꢀ16ꢀbits.ꢀItꢀisꢀfabricatedꢀusingꢀISSI's  
high-performanceꢀCMOSꢀtechnology.ꢀThisꢀhighlyꢀreliableꢀ  
process coupled with innovative circuit design techniques,  
yields high-performance and low power consumption  
devices.  
HIGH SPEED: (IS61/64WV12816DALL/DBLL)  
•ꢀ High-speedꢀaccessꢀtime:ꢀ8,ꢀ10,ꢀ12,ꢀ20ꢀns  
•ꢀ LowꢀActiveꢀPower:ꢀ135ꢀmWꢀ(typical)  
•ꢀ LowꢀStandbyꢀPower:ꢀ12ꢀµWꢀ(typical)  
CMOS standby  
LOW POWER: (IS61/64WV12816DALS/DBLS)  
•ꢀ High-speedꢀaccessꢀtime:ꢀ25,ꢀ35ꢀns  
•ꢀ LowꢀActiveꢀPower:ꢀ55ꢀmWꢀ(typical)  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be re-  
duced down with CMOS input levels.  
•ꢀ LowꢀStandbyꢀPower:ꢀ12ꢀµWꢀ(typical)  
CMOS standby  
EasymemoryexpansionꢀisꢀprovidedꢀbyꢀusingꢀChipꢀEnableꢀ  
andꢀOutputꢀEnableꢀinputs,ꢀCEꢀandꢀOE.ꢀTheꢀactiveꢀLOWꢀ  
Write Enable (WE) controls both writing and reading of the  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
•ꢀ Singleꢀpowerꢀsupply  
— Vddꢀ1.65Vꢀtoꢀ2.2Vꢀ(IS61WV12816DAxx)  
— Vddꢀ2.4Vꢀtoꢀ3.6Vꢀ(IS61/64WV12816DBxx)  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀ  
Theꢀ IS61WV12816DAxx/DBxxꢀ andꢀ IS64WV12816DBxxꢀ  
areꢀꢀpackagedꢀinꢀtheꢀJEDECꢀstandardꢀ44-pinꢀTSOPꢀTypeꢀ  
IIꢀꢀandꢀ48-pinꢀMiniꢀBGAꢀ(6mmꢀxꢀ8mm).  
required  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Dataꢀcontrolꢀforꢀupperꢀandꢀlowerꢀbytes  
•ꢀ IndustrialꢀandꢀAutomotiveꢀtemperatureꢀsupport  
•ꢀ Lead-freeꢀavailable  
FUNCTIONAL BLOCK DIAGRAM  
128K x 16  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-  
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain  
the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. E  
01/10/2013  

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