Datasheet > IS61WV102416DALL-10BLI

IS61WV102416DALL-10BLI

更新时间： 2022-09-29 19:18:39

品牌	Logo	应用领域
美国芯成 - ISSI		静态存储器
页数	文件大小	规格书
17页	628K
描述
IC SRAM 16M PARALLEL 48MGA

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IS61/64WV102416DALL

IS61/64WV102416DBLL

FUNCTION DESCRIPTION

SRAM is one of random access memories. Each byte or word has an address and can be accessed randomly. SRAM

has three different modes supported. Each function is described below with Truth Table.

STANDBY MODE

Device enters standby mode when deselected (CS# HIGH). The input and output pins (I/O0-15) are placed in a high

impedance state. CMOS input in this mode will maximize saving power.

WRITE MODE

Write operation issues with Chip selected (CS#) and Write Enable (WE#) input LOW. The input and output pins (I/O0-

15) are in data input mode. Output buffers are closed during this time even if OE# is LOW. UB# and LB# enables a

byte write feature. By enabling LB# LOW, data from I/O pins (I/O0 through I/O7) are written into the location specified

on the address pins. And with UB# being LOW, data from I/O pins (I/O8 through I/O15) are written into the location.

READ MODE

Read operation issues with Chip selected (CS# LOW) and Write Enable (WE#) input HIGH. When OE# is LOW, output

buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted. UB# and LB# enables a

byte read feature. By enabling LB# LOW, data from memory appears on I/O0-7. And with UB# being LOW, data from

memory appears on I/O8-15.

In the READ mode, output buffers can be turned off by pulling OE# HIGH. In this mode, internal device operates as

READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used.

POWER UP INITIALIZATION

The device includes on-chip voltage sensor used to launch POWER-UP initialization process.

When VDD reaches stable level, the device requires 150us of tPU (Power-Up Time) to complete its self-initialization

process.

When initialization is complete, the device is ready for normal operation.

tPU 150 us

Stable VDD

VDD

Device Initialization

Device for Normal Operation

TRUTH TABLE

Mode

CS#

WE#

OE#

LB#

UB#

I/O0-I/O7

I/O8-I/O15 VDD Current

Not Selected

High-Z

DOUT

High-Z

DOUT

DIN

High-Z

DOUT

High-Z

DIN

ISB1, ISB2

Output Disabled

ICC

Read

ICC

Write

High-Z

DIN

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A2

08/07/2019

1 234 5 6 7...17

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