Datasheet > IS49NLC93200

IS49NLC93200

更新时间： 2024-10-28 12:23:07

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器
页数	文件大小	规格书
34页	622K
描述
288Mb (x9, x18, x36) Common I/O RLDRAM 2 Memory

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IS49NLC93200 数据手册

IS49NLC93200,IS49NLC18160,IS49NLC36800

288Mb (x9, x18, x36) Common I/O RLDRAM^2 Memory

ADVANCED INFORMATION

JUNE 2012

FEATURES

•

533MHz DDR operation (1.067 Gb/s/pin data

rate)

•

Data mask signals (DM) to mask signal of

WRITE data; DM is sampled on both edges of

DK.

Differential input clocks (CK, CK#)

Differential input data clocks (DKx, DKx#)

On-die DLL generates CK edge-aligned data and

output data clock signals

•

38.4Gb/s peak bandwidth (x36 at 533 MHz

clock frequency)

•

Reduced cycle time (15ns at 533MHz)

32ms refresh (8K refresh for each bank; 64K

refresh command must be issued in total each

32ms)

•

Data valid signal (QVLD)

•

8 internal banks

HSTL I/O (1.5V or 1.8V nominal)

25-60Ω matched impedance outputs

2.5V V_EXT, 1.8V V_DD, 1.5V or 1.8V V_DDQI/O

On-die termination (ODT) R_TT

IEEE 1149.1 compliant JTAG boundary scan

Operating temperature:

Commercial

(T_C= 0° to +95°C; T_A= 0°C to +70°C),

Industrial

Non-multiplexed addresses (address

multiplexing option available)

SRAM-type interface

Programmable READ latency (RL), row cycle

time, and burst sequence length

Balanced READ and WRITE latencies in order to

optimize data bus utilization

•

(T_C= -40°C to +95°C; T_A= -40°C to +85°C)

OPTIONS

•

Package:

−

144-ball FBGA (leaded)

144-ball FBGA (lead-free)

•

Configuration:

−

32Mx9

16Mx18

8Mx36

•

Clock Cycle Timing:

Speed Grade

-18

-25E

-25

-33

-5

Unit

t_RC

t_CK

1.875

2.5

3.3

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the

latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can

reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such

applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

RLDRAM^is a registered trademark of Micron Technology, Inc.

Integrated Silicon Solution, Inc. – www.issi.com –

Rev. 00F, 06/20/2012

12 3 4 5 6 7...34

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与IS49NLC93200相关器件

型号	品牌	获取价格	描述	数据表
IS49NLC93200-25B	ISSI	获取价格	DDR DRAM, 32MX9, 2.5ns, CMOS, PBGA144, 11 X 18.50 MM, FBGA-144
IS49NLC93200-25BI	ISSI	获取价格	DDR DRAM, 32MX9, 2.5ns, CMOS, PBGA144, 11 X 18.50 MM, FBGA-144
IS49NLC93200-25BL	ISSI	获取价格	DDR DRAM, 32MX9, 2.5ns, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, FBGA-144
IS49NLC93200-25EBL	ISSI	获取价格	DDR DRAM, 32MX9, 2.5ns, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, FBGA-144
IS49NLC93200-25EBLI	ISSI	获取价格	DDR DRAM, 32MX9, 2.5ns, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, FBGA-144
IS49NLC93200-25EWBLI	ISSI	获取价格	DDR DRAM, 32MX9, CMOS, PBGA144, WBGA-144
IS49NLC93200-25WBL	ISSI	获取价格	DDR DRAM, 32MX9, CMOS, PBGA144, WBGA-144
IS49NLC93200-25WBLI	ISSI	获取价格	DDR DRAM, 32MX9, CMOS, PBGA144, WBGA-144
IS49NLC93200-33B	ISSI	获取价格	DDR DRAM, 32MX9, 3.3ns, CMOS, PBGA144, 11 X 18.50 MM, FBGA-144
IS49NLC93200-33BI	ISSI	获取价格	DDR DRAM, 32MX9, 3.3ns, CMOS, PBGA144, 11 X 18.50 MM, FBGA-144

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