Datasheet > 存储 > EEPROM> IS23SC1604-PI

IS23SC1604-PI

更新时间： 2024-02-10 22:12:33

品牌	Logo	应用领域
美国芯成 - ISSI		存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数	文件大小	规格书
18页	78K
描述
16-KBIT SECURED SERIAL EEPROM

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IS23SC1604-PI 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP,	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	风险等级：	5.88
Is Samacsys：	N	其他特性：	1000000 ERASE/WRITE CYCLES; 10 YEARS DATA RETENTION
最大时钟频率 (fCLK)：	0.3 MHz	数据保留时间-最小值：	10
JESD-30 代码：	R-PDIP-T8	JESD-609代码：	e0
长度：	9.3218 mm	内存密度：	16384 bit
内存集成电路类型：	EEPROM	内存宽度：	8
湿度敏感等级：	3	功能数量：	1
端子数量：	8	字数：	2048 words
字数代码：	2000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	2KX8	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
座面最大高度：	4.572 mm	串行总线类型：	3-WIRE
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
Base Number Matches：	1

IS23SC1604-PI 数据手册

IS23SC1604

ISSI

PIN NAMES⁽¹⁾

ISO

PAD

PAD Name

Vcc

Description

SupplyVoltage

Reset

RST

CLK

Serial Clock and Address Control

Security Fuse Pad

Ground

FUS

GND

No Connect

I/O

Bi-directional Data

Programming Control

PGM

Note:

1. Pins CLK, FUS, and PGM have internal pull-downs. Pin RST has an internal pull-up.

PIN DESCRIPTIONS

Symbol

Vcc

Card Contact

Name and Function

SupplyVoltage

RST

Reset: The device’s RST pin can be used to clear the internal address counter.

When CLK is LOW, a HIGH-to-LOW transition on RST resets the address

counter to zero, and the first bit of memory will be output on I/O after the

falling edge of RST. Also, the RST pin can be used to place the device in low

power standby mode by placing RST in HIGH logic state and both PGM and

FUS in LOW logic state.While RST is HIGH, the internal address counter will

not be incremented with CLK.

CLK

FUS

Serial Clock and Address Control: This is the device data clock pin. It is

used to clock data bits into and out of the device. It also increments the

internal address counter.

Security Fuse Pad: This pin is used by card issuer to personalize the device

before releasing it to the customer. When FUS pin is driven to logic HIGH state

and the state of the internal security fuse is HIGH (not blown), the issuer can

personalize the entire content of the memory with successful Security Code

(SC) validation.When FUS pin is driven to logic LOW state and the state of

the internal security fuse is HIGH (not blown), the full protection of the memory

is enabled and the security features of the device can be tested by the issuer.

After the device personalization is completed, the issuer should blow the

internal security fuse to logic LOW state so that the full protection of the

memory will always be enabled regardless of the state on FUS pin. (Refer to

IS23SC1604 Security Levels and also Blowing Internal Security Fuse.)

GND

Ground

No Connect

I/O

Serial Data Input and Output: This pin is where the data bit is shifted in and

out of the device when a clock pulse is applied to CLK pin.

PGM

Programming Control: This pin is asserted HIGH to initiate memory write or

erase operation.

Integrated Silicon Solution, Inc. — 1-800-379-4774

ADVANCE INFORMATION Rev. 00E

04/10/03

1 234 5 6 7...18

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