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IP82C237

更新时间： 2024-09-08 22:33:43
品牌 Logo 应用领域
英特矽尔 - INTERSIL 外围集成电路光电二极管控制器时钟
页数 文件大小 规格书
25页 161K
描述
CMOS High Performance Programmable DMA Controller

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IP82C237 数据手册

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82C237  
CMOS High Performance  
Programmable DMA Controller  
March 1997  
Features  
Description  
• Fully Compatible with Intersil 82C37A  
The 82C237 is a modified version of the 82C37A. The  
82C237 is fully software and pin for pin compatible with the  
82C37A but provides an additional mode for 16-bit DMA  
transfers, as well as enhanced speed. Each channel may be  
individually programmed for 8-bit or 16-bit data transfers.  
- 82C237 May be Used in 8MHz and 12.5MHz 82C37A  
Sockets  
• Optimized for 10MHz and 12.5MHz 80C286 Systems  
• Special Mode Permits 16-Bit, Zero Wait State DMA  
Transfers  
The 82C237 controller can improve system performance by  
allowing external devices to transfer data directly to or from  
system memory. Memory-to-memory transfer capability is  
also provided, along with a memory block initialization fea-  
ture. DMA requests may be generated by either hardware or  
software, and each channel is independently programmable  
with a variety of features for flexible operation.  
• High Speed Data Transfers:  
- Up to 6.25MBytes/sec with 12.5MHz Clock in  
Normal Mode  
- Up to 12.5MBytes/sec with 12.5MHz Clock in 16-Bit  
Mode  
The 82C237 is designed to be used with an external address  
latch, such as the 82C82, to demultiplex the most significant  
8 bits of address. An additional latch is required to  
temporarily store the most significant 8 bits of data if 16-bit  
memory-to-memory transfers are desired. The 82C237 can  
be used with industry standard microprocessors such as  
80C286, 80286, 80C86, 80C88, 8086, 8088, 8085, Z80,  
NSC800, 80186 and others. Multimode programmability  
allows the user to select from three basic types of DMA  
services, and reconfiguration under program control is  
possible even with the clock to the controller stopped. Each  
channel has a full 64K address and word count range, and  
may be programmed to autoinitialize these registers  
following DMA termination (end of process).  
• Compatible with the NMOS 8237A  
• Four Independent Maskable Channels with Autoinitial-  
ization Capability  
• Cascadable to any Number of Channels  
• Memory-to-Memory Transfers  
• Static CMOS Design Permits Low Power Operation  
- ICCSB = 10µA Maximum  
- ICCOP = 2mA/MHz Maximum  
• Fully TTL/CMOS Compatible  
• Internal Registers may be Read from Software  
Ordering Information  
TEMPERATURE  
PACKAGE  
PDIP  
RANGE  
8MHz  
CP82C237  
12.5MHz  
CP82C237-12  
IP82C237-12  
PKG. NO.  
o
o
0 C to +70 C  
E40.6  
E40.6  
o
o
-40 C to +85 C  
IP82C237  
o
o
PLCC  
0 C to +70 C  
CS82C237  
CS82C237-12  
IS82C237-12  
N44.65  
N44.65  
F40.6  
F40.6  
F40.6  
F40.6  
J44.A  
J44.A  
o
o
-40 C to +85 C  
IS82C237  
o
o
SBDIP  
0 C to +70 C  
CD82C237  
CD82C237-12  
ID82C237-12  
o
o
-40 C to +85 C  
ID82C237  
o
o
-55 C to +125 C  
MD82C237/B  
5962-9054304MQA  
MR82C237/B  
5962-9054304MXA  
MD82C237-12/B  
5962-9054305MQA  
MR82C237-12/B  
5962-9054305MXA  
SMD#  
CLCC  
SMD#  
o
o
-55 C to +125 C  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 2965.1  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19949-148  
1234567...25

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