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IMP1233D PDF预览

IMP1233D

更新时间: 2024-01-05 15:54:36
品牌 Logo 应用领域
IMP /
页数 文件大小 规格书
6页 120K
描述
Low Power, 5V, P Reset

IMP1233D 数据手册

 浏览型号IMP1233D的Datasheet PDF文件第1页浏览型号IMP1233D的Datasheet PDF文件第2页浏览型号IMP1233D的Datasheet PDF文件第3页浏览型号IMP1233D的Datasheet PDF文件第5页浏览型号IMP1233D的Datasheet PDF文件第6页 
IMP1233D  
Application Information  
Operation – Power Monitor  
The IMP1233D detects out-of-tolerance power supply conditions.  
It resets a processor during power-up and issues a reset to the sys-  
tem processor when the monitored power supply voltage is below  
the reset threshold (power-down). When an out-of-tolerance VCC  
voltage is detected, the RESET signal is asserted. On power-up,  
RESET is kept active (LOW) for approximately 350ms after the  
power supply voltage has reached the selected tolerance. This  
allows the power supply and microprocessor to stabilize before  
RESET is released.  
tR  
VCCTP (MAX)  
VCCTP  
VCCTP (MIN)  
VCC  
tRPU  
VOH  
RESET  
1233D_06.eps  
Figure 1. Timing Diagram: Power-Up  
tF  
VCC  
VCCTP (MAX)  
VCCTP  
VCCTP (MIN)  
tRPD  
RESET  
VOL  
1233D_07.eps  
Figure 2. Timing Diagram: Power-Down  
!
2000 © IMP, Inc.  
4
408-432-9100/www.impweb.com  

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