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IMI145158GXB PDF预览

IMI145158GXB

更新时间: 2024-09-16 20:44:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 光电二极管
页数 文件大小 规格书
10页 96K
描述
PLL Frequency Synthesizer, PDSO16, 0.300 INCH, SOIC-16

IMI145158GXB 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.84
模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZERJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:10.3 mm
湿度敏感等级:3端子数量:16
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:2.65 mm表面贴装:YES
端子面层:MATTE TIN (800)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.5 mm
Base Number Matches:1

IMI145158GXB 数据手册

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IMI145158  
SERIAL PROGRAMMED PLL FREQUENCY SYNTHESIZER  
Approved Product  
Product Description  
Product Features  
The IMI145158 is a member of a family of phaselock  
loop synthesizer ICs from International Microcircuits.  
This part is a single PLL in a small package for low cost  
VHF applications. The IMI145158 is programmed with  
standard 3-wire serial lines: data, clock, and enable.  
>145 MHz typical input frequency.  
-160 dBc/Hz total phase detector noise floor.  
No dead zone by design.  
Two phase detector outputs:  
Blocks in the IMI145158 include a dual modulus  
feedback divider for control of an external dual modulus  
Current mode charge pump  
Differential logic  
prescaler. Prescaler ratios up to 128:129.  
Also  
included are an “N” counter, reference divider, phase  
detector, and charge pump. The reference divider is  
programmable from 1 to 16383. Both divider inputs are  
biased for high sensitivity to sinewave input signals, and  
the reference divider input can be configured to operate  
as a crystal oscillator if desired. A buffered reference  
signal output is also provided. The phase detector is a  
Type IV phase-frequency design, which has inherently  
eliminated the “dead zone” crossover distortion. The  
loop error signal is provided by both a single-ended  
charge pump output and standard differential logic  
outputs.  
Unambiguous PLL acquisition.  
3-line serial programming: data, clock, & enable.  
Compatible with the SPI (Serial Peripheral  
Interface) on CMOS MCUs.  
10-bit N counter: Divider range = 1 to 1023.  
7-bit A counter: Divider range = 0 to 127.  
14-bit R counter: Divider range = 1 to 16383.  
On- or off-chip reference oscillator operation.  
Buffered & filtered ref output is provided.  
„ 16 Pin SOIC package  
Performance improvements of the IMI145158 over  
other single loop CMOS PLL devices are in the  
operating bandwidth and phase detector noise floor.  
With its extremely low phase noise floor and wider input  
bandwidth, prescaler ratios can be minimized to allow  
wide loop bandwidths for faster settling and lower phase  
noise.  
Block Diagram  
VDD = PIN 4  
VSS = PIN 6  
14 Bit Shift Register  
3
2
14 Bit Latch  
14 Bit /R Counter  
Control Logic  
7
Lock  
Detect  
LD  
1
1
13  
OSCin  
Fr  
2
OSCout  
Phase  
Detector  
A
14  
5
REFout  
PDout  
8
Fin  
11  
7 Bit /A Counter  
7 Bit Latch  
10 Bit /N Counter  
Enable  
16  
Phase  
Detector  
B
Phir  
10  
9
1
2
1-Bit  
Contro  
l S/R  
Data  
10 Bit Latch  
15  
1
2
3
Clock  
Phiv  
3
Fv  
12  
7 Bit Shift Register  
10 Bit Shift Register  
Mod  
Cntrl  
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.  
Rev 2.1  
5/29/2000  
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 276 FAX 408-263-6571  
http://www.imicorp.com  
Page 1 of 10  

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