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IDT74LVCH16701APF8 PDF预览

IDT74LVCH16701APF8

更新时间: 2024-09-16 20:05:19
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片光电二极管电视
页数 文件大小 规格书
8页 82K
描述
FIFO, 4X18, 6ns, Synchronous, CMOS, PDSO56, TVSOP-56

IDT74LVCH16701APF8 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.84
最长访问时间:6 ns周期时间:12 ns
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:11.3 mm内存密度:72 bit
内存宽度:18功能数量:1
端子数量:56字数:4 words
字数代码:4工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:4X18可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

IDT74LVCH16701APF8 数据手册

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3.3V CMOS  
IDT74LVCH16701A  
18-BIT READ/WRITE BUFFER  
WITH 5 VOLT TOLERANT I/O  
AND BUS-HOLD  
DESCRIPTION:  
FEATURES:  
The LVCH16701A 18-bit read/write buffer is built using advanced dual  
metal CMOS technology. The device is designed as an 18-bit read/write  
bufferwithafourdeepFIFOandaread-backlatch.Itcanbeusedasaread/  
writebufferbetweenaCPUandamemoryortointerfaceahigh-speedbus  
and a slow peripheral. The A-to-B (write) path has a four deep FIFO for  
pipelined operations. The FIFO can be reset and a FIFO full condition is  
indicated by the full flag (FF). The B-to-A (read) path has a latch.  
Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows  
the use of this device as a translator in a mixed 3.3V/5V supply system.  
TheLVCH16701Ahasbeendesignedwitha±24mAoutputdriver. This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4µ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
• Available in SSOP, TSSOP, and TVSOP packages  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Reduced system switching noise  
The LVCH16701A has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
A1-18  
3
18  
27  
OEBA  
29  
RESET  
55  
CLK  
Q
2
FIFO  
(4 deep)  
28  
WCE  
LATCH  
LE  
LE  
56  
RCE  
D
30  
FF  
1
OEAB  
18  
54  
B1-18  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
OCTOBER 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4233/3  

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