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IDT74FCT646CTPG8 PDF预览

IDT74FCT646CTPG8

更新时间: 2024-11-04 15:34:47
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路
页数 文件大小 规格书
8页 103K
描述
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, TSSOP-24

IDT74FCT646CTPG8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.84其他特性:DIRECTION CONTROL
系列:FCTJESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:7.8 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):5.7 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

IDT74FCT646CTPG8 数据手册

 浏览型号IDT74FCT646CTPG8的Datasheet PDF文件第2页浏览型号IDT74FCT646CTPG8的Datasheet PDF文件第3页浏览型号IDT74FCT646CTPG8的Datasheet PDF文件第4页浏览型号IDT74FCT646CTPG8的Datasheet PDF文件第5页浏览型号IDT74FCT646CTPG8的Datasheet PDF文件第6页浏览型号IDT74FCT646CTPG8的Datasheet PDF文件第7页 
FAST CMOS OCTAL  
TRANSCEIVER/  
IDT54/74FCT646T/AT/CT  
REGISTER (3-STATE)  
DESCRIPTION:  
FEATURES:  
TheFCT646Tconsistsofabustransceiverwith3-stateD-typeflip-flops  
andcontrolcircuitryarrangedformultiplexedtransmissionofdatadirectly  
from the data bus or from the internal storage registers. The FCT646T  
utilizes the enable control (G) and direction (DIR) pins to control the  
transceiverfunctions.  
• Std., A, and C grades  
• Low input and output leakage 1µA (max.)  
• CMOS power levels  
• True TTL input and output compatibility:  
– VOH = 3.3V (typ.)  
SABandSBAcontrolpinsareprovidedtoselecteitherreal-timeorstored  
data transfer. The circuitry used for select control will eliminate the typical  
decoding glitch that occurs in a multiplexer during the transition between  
storedandreal-timedata.Alowinputlevelselectsreal-timedataandahigh  
selectsstoreddata.  
– VOL = 0.3V (typ.)  
• High Drive outputs (-15mA IOH, 64mA IOL)  
• Meets or exceeds JEDEC standard 18 specifications  
• Military product compliant to MIL-STD-883, Class B and DESC  
listed (dual marked)  
Data on the A or B data bus, or both, can be stored in the internal D flip-  
flops by low-to-high transitions at the appropriate clock pins (CPAB or  
CPBA), regardless of the select or enable control pins.  
• Power off disable outputs permit "live insertion"  
• Available in the following packages:  
– Industrial: SOIC, SSOP, QSOP, TSSOP  
– Military: CERDIP, LCC  
FUNCTIONALBLOCKDIAGRAM  
G
DIR  
CPBA  
SBA  
CPAB  
SAB  
B REG  
ONE OF EIGHT CHANNELS  
1D  
C1  
A REG  
B1  
A1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MILITARY AND INDUSTRIAL TEMPERATURE RANGES  
JUNE 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-5505/3  

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