Datasheet > IDT74FCT163601APA

IDT74FCT163601APA

更新时间： 2024-11-08 23:11:43

品牌	Logo	应用领域
艾迪悌 - IDT		总线收发器输出元件
页数	文件大小	规格书
7页	108K
描述
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IDT74FCT163601APA 数据手册

浏览型号IDT74FCT163601APA的Datasheet PDF文件第2页

浏览型号IDT74FCT163601APA的Datasheet PDF文件第3页

浏览型号IDT74FCT163601APA的Datasheet PDF文件第4页

浏览型号IDT74FCT163601APA的Datasheet PDF文件第5页

IDT74FCT163601/A

ADVANCE INFORMATION

3.3V CMOS

18-BIT UNIVERSAL BUS

TRANSCEIVER

Integrated Device Technology, Inc.

WITH 3-STATE OUTPUTS

FEATURES:

• 0.5 MICRON CMOS Technology

universal bus transceivers combine D-type latches and D-

type flip-flops to allow data flow in transparent, latched and

clocked modes.

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

• Packages include 25 mil pitch SSOP, 19.6 mil pitch

TSSOP and 15.7 mil pitch TVSOP

• Extended commercial range of -40°C to +85°C

• VCC = 3.3V ±0.3V, Normal Range or

VCC = 2.7 to 3.6V, Extended Range

• CMOS power levels (0.4µW typ. static)

• Rail-to-Rail output swing for increased noise margin

• Low Ground Bounce (0.3V typ.)

• Inputs (except I/O) can be driven by 3.3V or 5V

components

Data flow in each direction is controlled by output-enable

(OEABandOEBA), latch-enable(LEABandLEBA), andclock

(CLKAB and CLKBA) inputs. The clock can be controlled by

theclock-enable(CLKENAB andCLKENBA)inputs. ForA-to-

Bdataflow,thedeviceoperatesinthetransparentmodewhen

LEAB is high. When LEAB is low, the A data is latched if

CLKAB is held at a high or low logic level. If LEAB is low, the

A-bus data is stored in the latch/flip-flop on the low-to-high

transition of CLKAB. Output enable OEAB is active low.

When OEAB is low, the outputs are active. When OEAB is

high, the outputs are in the high-impedance state.

DataflowforBtoAissimilartothatofAtoBbutusesOEBA,

LEBA, CLKBA and CLKENBA.

TheFCT163601hasseriescurrentlimitingresistors. These

offer low ground bounce, minimal undershoot, and controlled

output fall times-reducing the need for external series termi-

nating resistors.

DESCRIPTION:

The FCT163601/A 18-bit registered transceiver is built

using advanced dual metal CMOS technology. These 18-bit

FUNCTIONAL BLOCK DIAGRAM

OEAB

CLKENAB

CLKAB

LEAB

LEBA

CLKBA

CLKENBA

OEBA

CLK

3251 drw 01

TO 17 OTHER CHANNELS

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

AUGUST 1996

1996 Integrated Device Technology, Inc.

5.9

DSC-3251/1

12 3 4 5 6 7

中文翻译

下载PDF

与IDT74FCT163601APA相关器件

型号	品牌	获取价格	描述	数据表
IDT74FCT163601APAG	IDT	获取价格	Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TSSOP-5
IDT74FCT163601APF	IDT	获取价格	3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
IDT74FCT163601APF8	IDT	获取价格	Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TVSOP-5
IDT74FCT163601APV	IDT	获取价格	3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
IDT74FCT163601APV8	IDT	获取价格	Registered Bus Transceiver, FCT Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, SSOP-56
IDT74FCT163601PA	IDT	获取价格	3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
IDT74FCT163601PF	IDT	获取价格	3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
IDT74FCT163601PV	IDT	获取价格	3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
IDT74FCT163646	IDT	获取价格	3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS
IDT74FCT163646A	IDT	获取价格	3.3V CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS

与IDT74FCT163601APA相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

22
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

21
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

47
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

39

产品中心

服务支持

精选活动

关于我们

帮助中心

IDT74FCT163601APA

IDT74FCT163601APA 数据手册

与IDT74FCT163601APA相关器件

与IDT74FCT163601APA相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

IDT74FCT163601APA

IDT74FCT163601APA 数据手册

与IDT74FCT163601APA相关器件

与IDT74FCT163601APA相关文章

您还可以找

您在本页遇到什么问题？