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IDT74FCT163646CPVG PDF预览

IDT74FCT163646CPVG

更新时间: 2024-11-06 20:42:43
品牌 Logo 应用领域
艾迪悌 - IDT 输入元件光电二极管逻辑集成电路
页数 文件大小 规格书
8页 110K
描述
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, SSOP-56

IDT74FCT163646CPVG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:56
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.65其他特性:DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):5.7 ns认证状态:Not Qualified
座面最大高度:2.794 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

IDT74FCT163646CPVG 数据手册

 浏览型号IDT74FCT163646CPVG的Datasheet PDF文件第2页浏览型号IDT74FCT163646CPVG的Datasheet PDF文件第3页浏览型号IDT74FCT163646CPVG的Datasheet PDF文件第4页浏览型号IDT74FCT163646CPVG的Datasheet PDF文件第5页浏览型号IDT74FCT163646CPVG的Datasheet PDF文件第6页浏览型号IDT74FCT163646CPVG的Datasheet PDF文件第7页 
3.3V CMOS 16-BIT BUS  
TRANSCEIVER/REGISTER  
IDT74FCT163646A/C  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
The FCT16364616-bitregisteredtransceiveris builtusingadvanced  
dualmetalCMOStechnology. These high-speed,low-powerdevices are  
organizedas twoindependant8-bitbus transceivers with3-state D-type  
registers. Thecontrolcircuitryisorganizedformultiplexedtransmissionof  
data betweenAbus andBbus eitherdirectlyorfromthe internalstorage  
registers. Each8-bittransceiver/registerfeaturesdirectioncontrol(xDIR),  
over-ridingOutputEnablecontrol(xOE)andSelectlines(xSABandxSBA)  
to select either real-time data or stored data. Separate clock inputs are  
provided for A and B port registers. Data on the A or B data bus, or both,  
canbe storedinthe internalregisters bythe low-to-hightransitions atthe  
appropriateclockpins. Flow-throughorganizationofsignalpins simplifies  
layout.Allinputs are designedwithhysteresis forimprovednoise margin.  
The FCT163646 has series current limiting resistors. This offers low  
ground bounce, minimal undershoot, and controlled output fall times-  
reducingthe needforexternalseries terminatingresistors.  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended  
Range  
• CMOS power levels (0.4μ W typ. static)  
• Rail-to-rail output swing for increased noise margin  
Low Ground Bounce (0.3V typ.)  
Inputs (except I/O) can be driven by 3.3V or 5V components  
Available in SSOP and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
56  
29  
1OE  
2OE  
28  
1
1DIR  
2DIR  
55  
30  
2CLKBA  
31  
1CLKBA  
54  
1SBA  
2SBA  
2
27  
1CLKAB  
2CLKAB  
26  
3
1SAB  
2SAB  
B REG  
B REG  
D
D
C
C
52  
42  
15  
5
2B1  
1B1  
A REG  
A REG  
1A1  
2A1  
D
D
C
C
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
APRIL 2002  
1
© 2002 Integrated Device Technology, Inc.  
DSC-2778/2  

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