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IDT74FCT162344ATPVG PDF预览

IDT74FCT162344ATPVG

更新时间: 2024-10-28 18:54:35
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 78K
描述
Bus Driver, FCT Series, 4-Func, 2-Bit, True Output, CMOS, PDSO56, SSOP-56

IDT74FCT162344ATPVG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP-56
针数:56Reach Compliance Code:compliant
风险等级:5.83系列:FCT
JESD-30 代码:R-PDSO-G56JESD-609代码:e3
长度:18.415 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:2功能数量:4
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):4.8 ns
认证状态:Not Qualified座面最大高度:2.794 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

IDT74FCT162344ATPVG 数据手册

 浏览型号IDT74FCT162344ATPVG的Datasheet PDF文件第2页浏览型号IDT74FCT162344ATPVG的Datasheet PDF文件第3页浏览型号IDT74FCT162344ATPVG的Datasheet PDF文件第4页浏览型号IDT74FCT162344ATPVG的Datasheet PDF文件第5页浏览型号IDT74FCT162344ATPVG的Datasheet PDF文件第6页 
FAST CMOS  
ADDRESS/CLOCK  
DRIVER  
IDT74FCT162344AT/CT/ET  
DESCRIPTION:  
FEATURES:  
The FCT162344T is a 1:4 address/clock driver built using advanced dual  
metal CMOS technology. This high-speed, low power device provides the  
ability to fanout to memory arrays. Eight banks, each with a fanout of 4, and  
3-statecontrolprovideefficientaddressdistribution. Oneormorebanksmay  
beusedforclockdistribution.  
• 0.5 MICRON CMOS Technology  
• Ideal for address line driving and clock distribution  
• 8 banks with 1:4 fanout and 3-state  
• Typical tSK(o) (Output Skew) < 500ps  
• Balanced Output Drivers (±24mA)  
• Reduced system switching noise  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 5V ± 10%  
• Low input and output leakage 1µA (max.)  
• Available in SSOP and TSSOP packages  
TheFCT162344Thasbalancedoutputdrivewithcurrentlimitingresistors.  
Thisofferslowgroundbounce,minimalundershootandcontrolledoutputfall  
timesreducingtheneedforexternalseriesterminatingresistors.  
AlargenumberofpowerandgroundpinsandTTLoutputswingsalsoensure  
reducednoiselevels. Allinputsaredesignedwithhysteresisforimprovednoise  
margins.  
FUNCTIONALBLOCKDIAGRAM  
29  
1
OE1  
OE3  
34  
2
B11  
B51  
36  
8
A1  
A5  
30  
6
B14  
B54  
41  
9
B21  
B61  
42  
14  
A2  
A6  
37  
13  
B24  
B64  
56  
28  
OE2  
OE4  
48  
16  
B31  
B71  
43  
15  
A3  
A7  
44  
20  
B34  
B74  
55  
23  
B41  
B81  
49  
21  
A4  
A8  
51  
27  
B44  
B84  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
MAY 2002  
INDUSTRIALTEMPERATURERANGE  
1
© 2002 Integrated Device Technology, Inc.  
DSC-3069/6  

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