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IDT74FCT162344CTPF8 PDF预览

IDT74FCT162344CTPF8

更新时间: 2024-10-28 19:52:11
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路电视
页数 文件大小 规格书
6页 140K
描述
Low Skew Clock Driver, FCT Series, 8 True Output(s), 0 Inverted Output(s), CMOS, PDSO56, TVSOP-56

IDT74FCT162344CTPF8 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84系列:FCT
输入调节:SCHMITT TRIGGERJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:11.3 mm
负载电容(CL):50 pF逻辑集成电路类型:LOW SKEW CLOCK DRIVER
功能数量:4反相输出次数:
端子数量:56实输出次数:8
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):4.3 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.5 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

IDT74FCT162344CTPF8 数据手册

 浏览型号IDT74FCT162344CTPF8的Datasheet PDF文件第2页浏览型号IDT74FCT162344CTPF8的Datasheet PDF文件第3页浏览型号IDT74FCT162344CTPF8的Datasheet PDF文件第4页浏览型号IDT74FCT162344CTPF8的Datasheet PDF文件第5页浏览型号IDT74FCT162344CTPF8的Datasheet PDF文件第6页 
FAST CMOS  
ADDRESS/CLOCK  
DRIVER  
IDT74FCT162344AT/CT/ET  
DESCRIPTION:  
FEATURES:  
The FCT162344Tis a 1:4address/clockdriverbuiltusingadvanceddual  
metal CMOS technology. This high-speed, low power device provides the  
abilitytofanouttomemoryarrays. Eightbanks, eachwitha fanoutof4, and  
3-statecontrolprovideefficientaddressdistribution. Oneormorebanksmay  
beusedforclockdistribution.  
• 0.5 MICRON CMOS Technology  
Ideal for address line driving and clock distribution  
• 8 banks with 1:4 fanout and 3-state  
Typical tSK(o) (Output Skew) < 500ps  
• Balanced Output Drivers (±24mA)  
• Reduced system switching noise  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 5V ± 10%  
Low input and output leakage 1µA (max.)  
Available in SSOP, TSSOP and TVSOP packages  
TheFCT162344Thasbalancedoutputdrivewithcurrentlimitingresistors.  
Thisofferslowgroundbounce,minimalundershootandcontrolledoutputfall  
timesreducingtheneedforexternalseriesterminatingresistors.  
AlargenumberofpowerandgroundpinsandTTLoutputswingsalsoensure  
reducednoiselevels. Allinputsaredesignedwithhysteresisforimprovednoise  
margins.  
FUNCTIONALBLOCKDIAGRAM  
29  
1
OE1  
OE3  
34  
2
B11  
B51  
36  
8
A1  
A5  
30  
6
B14  
B54  
41  
9
B21  
B61  
42  
14  
A2  
A6  
37  
13  
B24  
B64  
56  
28  
OE2  
OE4  
48  
16  
B31  
B71  
43  
15  
A3  
A7  
44  
20  
B34  
B74  
55  
23  
B41  
B81  
49  
21  
A4  
A8  
51  
27  
B44  
B84  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
JANUARY 2002  
INDUSTRIALTEMPERATURERANGE  
1
© 2002 Integrated Device Technology, Inc.  
DSC-3069/5  

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