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IDT74FCT162344ATPV PDF预览

IDT74FCT162344ATPV

更新时间: 2024-11-25 23:12:47
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器双倍数据速率
页数 文件大小 规格书
8页 128K
描述
FAST CMOS ADDRESS/ CLOCK DRIVER

IDT74FCT162344ATPV 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP56,.4
针数:56Reach Compliance Code:not_compliant
风险等级:5.91系列:FCT
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:18.415 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:2功能数量:4
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):225
电源:5 V传播延迟(tpd):4.8 ns
认证状态:Not Qualified座面最大高度:2.794 mm
子类别:Other Logic ICs最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:7.5 mmBase Number Matches:1

IDT74FCT162344ATPV 数据手册

 浏览型号IDT74FCT162344ATPV的Datasheet PDF文件第2页浏览型号IDT74FCT162344ATPV的Datasheet PDF文件第3页浏览型号IDT74FCT162344ATPV的Datasheet PDF文件第4页浏览型号IDT74FCT162344ATPV的Datasheet PDF文件第5页浏览型号IDT74FCT162344ATPV的Datasheet PDF文件第6页浏览型号IDT74FCT162344ATPV的Datasheet PDF文件第7页 
FAST CMOS ADDRESS/  
CLOCK DRIVER  
IDT54/74FCT162344AT/CT/ET  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
• Ideal for address line driving and clock distribution  
• 8 banks with 1:4 fanout and 3-state  
• Typical tSK(o) (Output Skew) < 500ps  
• Balanced Output Drivers: ±24mA (commercial),  
±16mA (military)  
The FCT162344AT/CT/ET is a 1:4 address line driver built  
using advanced dual metal CMOS technology. This high-  
speed, low power device provides the ability to fanout to  
memory arrays. Eight banks, each with a fanout of 4, and 3-  
state control provide efficient address distribution. One or  
more banks may be used for clock distribution.  
• Reduced system switching noise  
The FCT162344AT/CT/ET has balanced output drive with  
current limiting resistors. This offers low ground bounce,  
minimal undershoot and controlled output fall times reducing  
the need for external series terminating resistors.  
A large number of power and ground pins and TTL output  
swings also ensure reduced noise levels. All inputs are  
designed with hysteresis for improved noise margins.  
• ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
• Packagesinclude25milpitchSSOP,19.6milpitchTSSOP,  
15.7 mil pitch TVSOP and 25 mil pitch Cerpack  
• Extended commercial range of -40°C to +85°C  
• VCC = 5V ±10%  
• Low input and output leakage 1µA (max.)  
FUNCTIONAL BLOCK DIAGRAM  
OE1  
OE3  
B11  
B51  
A1  
A5  
B14  
B54  
B21  
B61  
A2  
A6  
B24  
B64  
OE2  
OE4  
B31  
B71  
A3  
A7  
B34  
B74  
B41  
B81  
A4  
A8  
B44  
B84  
3069 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
AUGUST 1996  
1996 Integrated Device Technology, Inc.  
5.6  
DSC-3069/3  
1

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