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IDT74ALVCH16374PF8 PDF预览

IDT74ALVCH16374PF8

更新时间: 2024-11-10 06:12:07
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管电视
页数 文件大小 规格书
6页 72K
描述
Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.40 MM PITCH, TVSOP-48

IDT74ALVCH16374PF8 数据手册

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3.3V CMOS 16-BIT EDGE-  
TRIGGERED D-TYPE  
IDT74ALVCH16374  
LATCH WITH 3-STATE  
OUTPUTS AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
This16-bitedge-triggeredD-typeflip-flopisbuiltusingadvanceddualmetal  
CMOStechnology.TheALVCH16374isparticularlysuitableforimplementing  
bufferregisters,I/Oports,bidirectionalbusdrivers,andworkingregisters.Itcan  
beusedastwo8-bitflip-flopsorone16-bitflip-flop.Onthepositivetransitionof  
theclock(CLK)input,theQoutputsoftheflip-floptakeonthelogiclevelsatthe  
data(D)inputs.OEcanbeusedtoplacetheeightoutputsineitheranormallogic  
state(highorlowlogiclevels)orahigh-impedancestate.Inthehigh-impedance  
state, the outputs neitherloadnordrive the bus lines significantly. The high-  
impedancestateandtheincreaseddriveprovidethecapabilitytodrivebuslines  
withoutneedforinterface orpullupcomponents.OE does notaffectinternal  
operationsoftheflip-flop.Olddatacanberetainedornewdatacanbeentered  
whiletheoutputsareinthehigh-impedancestate.  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 3.3V ± 0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4μ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
Available in SSOP, TSSOP, and TVSOP packages  
DRIVE FEATURES:  
High Output Drivers: ±24mA  
• Suitable for heavy loads  
The ALVCH16374 has been designed with a ±24mA output driver. This  
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed  
performance.  
The ALVCH16374 has bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputsand  
eliminatestheneedforpull-up/downresistor.  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1
24  
2OE  
1OE  
48  
25  
2CLK  
1CLK  
C1  
C1  
2
13  
1Q1  
2Q1  
47  
36  
1D1  
1D  
1D  
2D1  
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
APRIL 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4564/2  

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