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IDT74ALVCH16525PA8 PDF预览

IDT74ALVCH16525PA8

更新时间: 2024-11-09 20:03:15
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 75K
描述
Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56

IDT74ALVCH16525PA8 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:unknown风险等级:5.84
其他特性:WITH CLOCK ENABLE FOR EACH REGISTER系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:14 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
位数:18功能数量:1
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):4.4 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:6.1 mm
Base Number Matches:1

IDT74ALVCH16525PA8 数据手册

 浏览型号IDT74ALVCH16525PA8的Datasheet PDF文件第2页浏览型号IDT74ALVCH16525PA8的Datasheet PDF文件第3页浏览型号IDT74ALVCH16525PA8的Datasheet PDF文件第4页浏览型号IDT74ALVCH16525PA8的Datasheet PDF文件第5页浏览型号IDT74ALVCH16525PA8的Datasheet PDF文件第6页浏览型号IDT74ALVCH16525PA8的Datasheet PDF文件第7页 
3.3V CMOS 18-BIT  
IDT74ALVCH16525  
REGISTERED BUS TRANS-  
CEIVER WITH 3-STATE  
OUTPUTS AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
This 18-bit registered bus transceiver is built using advanced dual metal  
CMOStechnology.Dataflowineachdirectioniscontrolledbyoutput-enable  
(OEABandOEBA)andclock-enable(CLKENABandCLKENBA)inputs.For  
theA-to-Bdataflow,thedataflowsthroughasingleregister.TheB-to-Adata  
canflowthroughafour-stagepipelineregisterpath,orthroughasingleregister  
path,dependingonthestateoftheselect(SEL)input.Dataisstoredintheinternal  
registersonthelow-to-hightransitionoftheclock(CLK)input,providedthatthe  
appropriateCLKENinputsarelow.TheA-to-Bdatatransferissynchronized  
totheCLKABinput,andB-to-AdatatransferissynchronizedwiththeCLK1BA  
andCLK2BAinputs.  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in SSOP, TSSOP, and TVSOP packages  
The ALVCH16525 has been designed with a ±24mA output driver. This  
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed  
performance.  
The ALVCH16525 has “bus-hold” which retains the inputs’ last state  
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs  
andeliminatestheneedforpull-up/downresistors.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Suitable for heavy loads  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
55  
CLKAB  
30  
CLK1BA  
29  
CLK2BA  
28  
CLKENBA  
1
CLKENAB  
OEAB  
27  
OE
6  
EL  
CE  
CE  
C1  
CE  
C1  
1D  
CE  
C1  
1D  
0
C1  
3
A1  
54  
1D  
1
1D  
B1  
CE  
C1  
1D  
1 of 18 Channels  
To 17 Other Channels  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
APRIL 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4694/2  

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