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IDT72V17320L10BBI8 PDF预览

IDT72V17320L10BBI8

更新时间: 2024-11-19 21:18:19
品牌 Logo 应用领域
艾迪悌 - IDT 时钟先进先出芯片内存集成电路
页数 文件大小 规格书
26页 231K
描述
FIFO, 8KX32, 6.5ns, Synchronous, CMOS, PBGA144, 13 X 13 MM, 1 MM PITCH, PLASTIC, BGA-144

IDT72V17320L10BBI8 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:13 X 13 MM, 1 MM PITCH, PLASTIC, BGA-144
针数:144Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.72最长访问时间:6.5 ns
最大时钟频率 (fCLK):100 MHz周期时间:10 ns
JESD-30 代码:S-PBGA-B144JESD-609代码:e0
长度:13 mm内存密度:262144 bit
内存集成电路类型:OTHER FIFO内存宽度:32
湿度敏感等级:3功能数量:1
端子数量:144字数:8192 words
字数代码:8000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:8KX32可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA144,12X12,40封装形状:SQUARE
封装形式:GRID ARRAY并行/串行:PARALLEL
峰值回流温度(摄氏度):225电源:3.3 V
认证状态:Not Qualified座面最大高度:1.97 mm
最大待机电流:0.015 A子类别:FIFOs
最大压摆率:0.04 mA最大供电电压 (Vsup):3.45 V
最小供电电压 (Vsup):3.15 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn63Pb37)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:13 mmBase Number Matches:1

IDT72V17320L10BBI8 数据手册

 浏览型号IDT72V17320L10BBI8的Datasheet PDF文件第2页浏览型号IDT72V17320L10BBI8的Datasheet PDF文件第3页浏览型号IDT72V17320L10BBI8的Datasheet PDF文件第4页浏览型号IDT72V17320L10BBI8的Datasheet PDF文件第5页浏览型号IDT72V17320L10BBI8的Datasheet PDF文件第6页浏览型号IDT72V17320L10BBI8的Datasheet PDF文件第7页 
IDT72V15160  
IDT72V16160  
IDT72V17160  
IDT72V18160  
IDT72V19160  
IDT72V14320  
IDT72V15320  
IDT72V16320  
IDT72V17320  
IDT72V18320  
IDT72V19320  
3.3V MULTIMEDIA FIFO  
16 BIT V-III, 32 BIT Vx-III FAMILY  
UP TO 1 Mb DENSITY  
Master Reset clears entire FIFO  
FEATURES:  
Partial Reset clears data, but retains programmable settings  
Empty, Full and Half-Full flags signal FIFO status  
Programmable Almost-Empty and Almost-Full flags, each flag can  
default to one of eight preselected offsets  
Program programmable flags through serial input  
Output enable puts data outputs into high impedance state  
JTAG port, provided for Boundary Scan function (PBGA Only)  
Available in a 80-pin (V-III) Thin Quad Flat Pack, 128-pin(Vx-III)  
Thin Quad Flat Pack (TQFP) or a 144-pin (Vx-III) Plastic Ball Grid  
Array (PBGA) (with additional features)  
Choose among the following memory organizations: Commercial  
V-III  
Vx-III  
IDT72V15160 - 4,096 x 16  
IDT72V16160 - 8,192 x 16  
IDT72V17160 - 16,384 x 16  
IDT72V18160 - 32,768 x 16  
IDT72V19160 - 65,536 x 16  
IDT72V14320 - 1,024 x 32  
IDT72V15320 - 2,048 x 32  
IDT72V16320 - 4,096 x 32  
IDT72V17320 - 8,192 x 32  
IDT72V18320 - 16,384 x 32  
IDT72V19320 - 32,768 x 32  
Industrial temperature range (–40°C to +85°C)  
High-performance submicron CMOS technology  
Up to 100 MHz Operation of the Clocks  
5V input tolerant  
Auto power down minimizes standby power consumption  
FUNCTIONALBLOCKDIAGRAM  
*Available on the Vx-III PBGA package only.  
MRS  
PRS  
WCLK  
RCLK  
READ  
CONTROL  
WRITE  
CONTROL  
RESET LOGIC  
FIFO ARRAY  
WEN  
REN  
OE  
D0 - Dn  
Data In  
x16, x32  
Q0 - Qn  
Data Out  
x16, x32  
TCK  
*
FLAG LOGIC  
*
TRST  
*
JTAG CONTROL  
(BOUNDARY  
SCAN)  
TMS  
*
TDI  
TDO  
*
*
LD  
SI  
FSEL1 EF  
HF  
PAE  
FF  
PAF  
SEN PFM FSEL0  
6163 drw01  
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.  
NOVEMBER 2003  
INDUSTRIALTEMPERATURERANGE  
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-6163/2  

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