Datasheet > IDT72T7295L5BBGI

IDT72T7295L5BBGI

更新时间： 2024-11-08 03:08:23

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
53页	465K
描述
FIFO, 32KX72, 3.6ns, Synchronous, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, GREEN, PLASTIC, BGA-324

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IDT72T7295L5BBGI 数据手册

2.5 VOLT HIGH-SPEED TeraSync^TMFIFO 72-BIT CONFIGURATIONS

16,384 x 72, 32,768 x 72,

65,536 x 72, 131,072 x 72

IDT72T7285, IDT72T7295,

IDT72T72105, IDT72T72115

- x72 in to x72 out

FEATURES:

- x72 in to x36 out

- x72 in to x18 out

- x36 in to x72 out

- x18 in to x72 out

• Big-Endian/Little-Endian user selectable byte representation

• Auto power down minimizes standby power consumption

• Master Reset clears entire FIFO

• Partial Reset clears data, but retains programmable settings

• Empty, Full and Half-Full flags signal FIFO status

• Select IDT Standard timing (using EF and FF flags) or First Word

Fall Through timing (using OR and IR flags)

• Output enable puts data outputs into high impedance state

• JTAG port, provided for Boundary Scan function

• Available in 324-pin (19mm x 19mm)Plastic Ball Grid Array (PBGA)

• Easily expandable in depth and width

• Choose among the following memory organizations:

IDT72T7285

IDT72T7295

IDT72T72105

IDT72T72115

⎯

16,384 x 72

32,768 x 72

65,536 x 72

131,072 x 72

• Up to 225 MHz Operation of Clocks

• User selectable HSTL/LVTTL Input and/or Output

• Read Enable & Read Clock Echo outputs aid high speed operation

• User selectable Asynchronous read and/or write port timing

• 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage

• 3.3V Input tolerant

• Mark & Retransmit, resets read pointer to user marked position

• Write Chip Select (WCS) input disables Write Port HSTL inputs

• Read Chip Select (RCS) synchronous to RCLK

• Programmable Almost-Empty and Almost-Full flags, each flag can

default to one of eight preselected offsets

• Program programmable flags by either serial or parallel means

• Selectable synchronous/asynchronous timing modes for Almost-

Empty and Almost-Full flags

• Independent Read and Write Clocks (permit reading and writing

simultaneously)

• High-performance submicron CMOS technology

• Industrial temperature range (–40°C to +85°C) is available

• Green parts are available, see ordering information

• Separate SCLK input for Serial programming of flag offsets

• User selectable input and output port bus-sizing

FUNCTIONALBLOCKDIAGRAM

D0 -Dn (x72, x36 or x18)

LD SEN

SCLK

WEN

WCLK/WR

WCS

INPUT REGISTER

OFFSET REGISTER

FF/IR

PAF

EF/OR

PAE

FWFT/SI

PFM

FSEL0

FSEL1

WRITE CONTROL

LOGIC

ASYW

FLAG

LOGIC

RAM ARRAY

16,384 x 72

32,768 x 72

65,536 x 72

131,072 x 72

WRITE POINTER

CONTROL

LOGIC

READ POINTER

BUS

CONFIGURATION

READ

CONTROL

LOGIC

MARK

ASYR

MRS

PRS

OUTPUT REGISTER

RESET

LOGIC

TCK

TRST

TMS

TDO

JTAG CONTROL

(BOUNDARY SCAN)

RCLK/RD

REN

RCS

TDI

Vref

WHSTL

RHSTL

SHSTL

HSTL I/0

CONTROL

EREN

5994 drw01

Q0 -Qn (x72, x36 or x18)

ERCLK

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology, Inc. TheTeraSyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.

FEBRUARY 2009

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

DSC-5994/15

12 3 4 5 6 7...53

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与IDT72T7295L5BBGI相关器件

型号	品牌	获取价格	描述	数据表
IDT72T7295L5BBI	IDT	获取价格	2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS
IDT72T7295L6-7BB	IDT	获取价格	FIFO, 32KX72, 3.8ns, Synchronous, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-324
IDT72T7295L6-7BBG	IDT	获取价格	FIFO, 32KX72, 3.8ns, Synchronous, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, GREEN, PLASTIC, B
IDT72T7295L6-7BBGI	IDT	获取价格	FIFO, 32KX72, Synchronous, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-324
IDT72T7295L6-7BBI	IDT	获取价格	FIFO, 32KX72, Synchronous, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, PLASTIC, BGA-324
IDT72T7295L6BB	IDT	获取价格	2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS
IDT72T7295L6BBI	IDT	获取价格	2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS
IDT72T7295L7BB	IDT	获取价格	2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS
IDT72T7295L7BBI	IDT	获取价格	2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS
IDT72V01	IDT	获取价格	3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9, 1024 x 9, 2048 x 9, 4096 x 9

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