IDT72811L35PF

更新时间： 2024-11-08 22:57:23

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
21页	231K
描述
DUAL CMOS SyncFIFO

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IDT72811L35PF 数据手册

IDT72801

IDT72811

IDT72821

IDT72831

IDT72841

DUAL CMOS SyncFIFO

Integrated Device Technology, Inc.

(clocked) FIFOs. The device is functionally equivalent to two

72201/72211/72221/72231/72241 FIFOs in a single package

with all associated control, data, and flag lines assigned to

separate pins.

Each of the two FIFOs (designated FIFO A and FIFO B)

contained in the 72801/72811/72821/72831/72841 has a 9-

bit input data port (DA0 - DA8), DB0 - DB8) and a 9-bit output

data port (QA0 - QA8, QB0 - QB8). Each input port is

controlled by a free-running clock(WCLKA, WCLKB), and two

write enable pins (WENA1, WENA2, WENB1, WENB2). Data

iswrittenintoeachofthetwoarraysoneveryrisingclockedge

of the write clock (WCLKA WCLKB) when the appropriate

write enable pins are asserted.

The output port of each FIFO bank is controlled by its

associated clock pin (RCLKA, RCLKB) and two read enable

pins (RENA1, RENA2, RENB1, RENB2). The read clock can

be tied to the write clock for single clock operation or the two

clocks can run asynchronous of one another for dual clock

operation. Anoutputenablepin(OEA,OEB)isprovidedonthe

read port of each FIFO for three-state output control .

EachofthetwoFIFOshastwofixedflags,empty(EFA,EFB)

and full (FFA, FFB). Two programmable flags, almost-empty

(PAEA, PAEB) and almost-full (PAFA, PAFB), are provided for

FEATURES:

• The 72801 is equivalent to two 72201 256 x 9 FIFOs

• The 72811 is equivalent to two 72211 512 x 9 FIFOs

• The 72821 is equivalent to two 72221 1024 x 9 FIFOs

• The 72831 is equivalent to two 72231 2048 x 9 FIFOs

• The 72841 is equivalent to two 72241 4096 x 9 FIFOs

• Offers optimal combination of large capacity, high speed,

design flexibility and small footprint

• Ideal for prioritization, bidirectional, and width expansion

applications

• 15 ns read/write cycle time FOR THE 72801/72811

• 20 ns read/write cycle time FOR THE 72821/72831/72841

• Separate control lines and data lines for each FIFO

• Separate empty, full, programmable almost-empty and

almost-full flags for each FIFO

• Enable puts output data lines in high-impedance state

• Space-saving 64-pin Thin Quad Flat Pack (TQFP)

• Industrial temperature range (-40^OC to +85^OC) is avail-

able, tested to military electrical specifications

DESCRIPTION:

72801/72811/72821/72831/72841 are dual synchronous

PIN CONFIGURATION

QB0

QA1

QA2

FFB

EFB

QA3

OEB

RENB2

RCLKB

RENB1

GND

VCC

QA4

QA5

QA6

QA7

PN64-1

QA8

VCC

PAEB

PAFB

DB0

WENA2/LDA

WCLKA

WENA1

RSA

TQFP,

TOP VIEW

DB1

DB2

DA8

DB3

DA7

DB4

DA6

3034 drw 01

SyncFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

NOVEMBER 1996

1996 Integrated Device Technology, Inc

DSC-3034/1

For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.

5.15

12 3 4 5 6 7...21

中文翻译

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与IDT72811L35PF相关器件

型号	品牌	获取价格	描述	数据表
IDT72811L35PFSCDS-W	ETC	获取价格	x9 Synchronous FIFO
IDT72811L35TFSCDS-W	ETC	获取价格	x9 Synchronous FIFO
IDT72815LB	IDT	获取价格	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUA
IDT72815LB10BG	IDT	获取价格	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUA
IDT72815LB10BGI	IDT	获取价格	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUA
IDT72815LB10PF	IDT	获取价格	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUA
IDT72815LB10PF9	IDT	获取价格	FIFO, 512X18, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72815LB10PFI	IDT	获取价格	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUA
IDT72815LB15B	IDT	获取价格	FIFO, 512X18, 10ns, Synchronous, CMOS, PBGA121, 16 X 16 MM, PLASTIC, BGA-121
IDT72815LB15BG	IDT	获取价格	CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18, and DUA

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