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IDT72815LB25PF PDF预览

IDT72815LB25PF

更新时间: 2024-11-06 21:17:27
品牌 Logo 应用领域
艾迪悌 - IDT 时钟先进先出芯片内存集成电路
页数 文件大小 规格书
26页 491K
描述
FIFO, 512X18, 15ns, Synchronous, CMOS, PQFP128, TQFP-128

IDT72815LB25PF 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-128针数:128
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.84
最长访问时间:15 ns最大时钟频率 (fCLK):40 MHz
周期时间:25 nsJESD-30 代码:R-PQFP-G128
JESD-609代码:e0长度:20 mm
内存密度:9216 bit内存集成电路类型:OTHER FIFO
内存宽度:18湿度敏感等级:3
功能数量:1端子数量:128
字数:512 words字数代码:512
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512X18
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP128,.63X.87,20
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.01 A
子类别:FIFOs最大压摆率:0.1 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:14 mm
Base Number Matches:1

IDT72815LB25PF 数据手册

 浏览型号IDT72815LB25PF的Datasheet PDF文件第2页浏览型号IDT72815LB25PF的Datasheet PDF文件第3页浏览型号IDT72815LB25PF的Datasheet PDF文件第4页浏览型号IDT72815LB25PF的Datasheet PDF文件第5页浏览型号IDT72815LB25PF的Datasheet PDF文件第6页浏览型号IDT72815LB25PF的Datasheet PDF文件第7页 
CMOS DUAL SyncFIFO™  
DUAL 256 x 18, DUAL 512 x 18,  
DUAL 1,024 x 18, DUAL 2,048 x 18  
and DUAL 4,096 x 18  
IDT72805LB  
IDT72815LB  
IDT72825LB  
IDT72835LB  
IDT72845LB  
Single or double register-buffered Empty and Full Flags  
Easily expandable in depth and width  
Asynchronous or coincident Read and Write clocks  
Asynchronous or synchronous programmable Almost-Empty  
and Almost-Full flags with default settings  
FEATURES:  
The IDT72805LB is equivalent to two IDT72205LB 256 x 18 FIFOs  
The IDT72815LB is equivalent to two IDT72215LB 512 x 18 FIFOs  
The IDT72825LBis equivalenttotwoIDT72225LB1,024x18FIFOs  
The IDT72835LBis equivalenttotwoIDT72235LB2,048x18FIFOs  
The IDT72845LBis equivalenttotwoIDT72245LB4,096x18FIFOs  
Offers optimal combination of large capacity (8K), high speed,  
design flexibility, and small footprint  
Half-Full flag capability  
Output Enable puts output data bus in high-impedance state  
High-performance submicron CMOS technology  
Available in the 128-pin Thin Quad Flatpack (TQFP). Also  
available for the IDT72805LB/72815LB/72825LB, in the 121-lead,  
16 x 16 mm plastic Ball Grid Array (BGA)  
Ideal for the following applications:  
-
-
-
-
-
-
Network switching  
Two level prioritization of parallel data  
Bidirectional data transfer  
Bus-matching between 18-bit and 36-bit data paths  
Width expansion to 36-bit per package  
Depth expansion to 8,192 words per package  
Industrial temperature range (–40°C to +85°C) is available  
DESCRIPTION:  
TheIDT72805LB/72815LB/72825LB/72835LB/72845LBaredual18-bit-wide  
synchronous(clocked)First-in,First-out(FIFO)memories.OnedualIDT72805LB/  
72815LB/72825LB/72835LB/72845LB device is functionally equivalent to two  
10ns read/write cycle time, 6.5ns access time  
IDT Standard or First Word Fall Through timing  
FUNCTIONAL BLOCK DIAGRAM  
HFA/(WXOA)  
PAEA  
FFA/IRA  
EFA/  
ORA  
WCLKA  
WCLKB  
DA0-DA17  
WENA  
LDA  
WENB  
DB0-DB17  
LDB  
PAFA  
INPUT  
OFFSET  
INPUT  
OFFSET  
REGISTER  
REGISTER  
REGISTER  
REGISTER  
FFB/IRB  
FLAG  
PAFB  
WRITE  
FLAG  
LOGIC  
WRITE  
EFB/ORB  
PAEB  
HFB/(WXOB)  
CONTROL  
LOGIC  
RAM  
LOGIC  
CONTROL  
LOGIC  
ARRAY  
RAM  
256 x 18  
512 x 18  
1,024 x 18  
2,048 x 18  
4,096 x 18  
ARRAY  
256 x 18  
512 x 18  
1,024 x 18  
2,048 x 18  
4,096 x 18  
READ  
POINTER  
WRITE  
READ  
POINTER  
POINTER  
WRITE  
POINTER  
READ  
CONTROL  
LOGIC  
FLA  
WXIA  
(HFA)/WXOA  
RXIA  
READ  
CONTROL  
LOGIC  
EXPANSION  
LOGIC  
EXPANSION  
LOGIC  
OUTPUT  
REGISTER  
OUTPUT  
REGISTER  
RXOA  
RESET  
LOGIC  
RSA  
RESET  
LOGIC  
RSB  
RXOB  
RXIB  
(HFB)/WXOB  
WXIB  
FLB  
RCLKB  
RCLKA  
OEB  
QA0-QA17  
RENB  
RENA  
OEA  
QB0-QB17  
3139 drw 01  
The IDT logo is a registered trademark and the SyncFIFO is a trademark of Integrated Device Technology, Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
MAY 2001  
1
2001 Integrated Device Technology, Inc.  
DSC-3139/3  

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