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IDT72811L25TF9 PDF预览

IDT72811L25TF9

更新时间： 2024-11-05 19:12:59
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
16页 211K
描述
FIFO, 512X9, 15ns, Synchronous, CMOS, PQFP64, SLIM, TQFP-64

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IDT72811L25TF9 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：LFQFP,针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.28
Is Samacsys：N最长访问时间：15 ns
周期时间：25 nsJESD-30 代码：S-PQFP-G64
JESD-609代码：e0长度：10 mm
内存密度：4608 bit内存宽度：9
湿度敏感等级：3功能数量：2
端子数量：64字数：512 words
字数代码：512工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：512X9可输出：YES
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
并行/串行：PARALLEL峰值回流温度（摄氏度）：240
认证状态：Not Qualified座面最大高度：1.6 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：20宽度：10 mm
Base Number Matches：1

IDT72811L25TF9 数据手册

 浏览型号IDT72811L25TF9的Datasheet PDF文件第2页浏览型号IDT72811L25TF9的Datasheet PDF文件第3页浏览型号IDT72811L25TF9的Datasheet PDF文件第4页浏览型号IDT72811L25TF9的Datasheet PDF文件第5页浏览型号IDT72811L25TF9的Datasheet PDF文件第6页浏览型号IDT72811L25TF9的Datasheet PDF文件第7页 
IDT72801  
IDT72811  
IDT72821  
IDT72831  
IDT72841  
IDT72851  
DUAL CMOS SyncFIFO™  
DUAL 256 x 9, DUAL 512 x 9,  
DUAL 1,024 x 9, DUAL 2,048 x 9,  
DUAL 4,096 x 9, DUAL 8,192 x 9  
Eachofthe twoFIFOs (designatedFIFOAandFIFOB)containedinthe  
IDT72801/72811/72821/72831/72841/72851hasa9-bitinputdataport(DA0  
-DA8,DB0-DB8)anda9-bitoutputdataport(QA0-QA8,QB0-QB8).Each  
inputportiscontrolledbyafree-runningclock(WCLKA,WCLKB),andtwoWrite  
Enablepins(WENA1,WENA2,WENB1,WENB2). Dataiswrittenintoeachof  
thetwoarraysoneveryrisingclockedgeoftheWriteClock(WCLKA,WCLKB)  
whenthe appropriate write enable pins are asserted.  
FEATURES:  
•
•
•
•
•
•
The IDT72801 is equivalent to two IDT72201 256 x 9 FIFOs  
The IDT72811 is equivalent to two IDT72211 512 x 9 FIFOs  
The IDT72821 is equivalent to two IDT72221 1,024 x 9 FIFOs  
The IDT72831 is equivalent to two IDT72231 2,048 x 9 FIFOs  
The IDT72841 is equivalent to two IDT72241 4,096 x 9 FIFOs  
The IDT72851 is equivalent to two IDT72251 8,192 x 9 FIFOs  
TheoutputportofeachFIFObankiscontrolledbyitsassociated clockpin  
(RCLKA, RCLKB) and two Read Enable pins (RENA1, RENA2, RENB1,  
RENB2).TheReadClockcanbetiedtotheWriteClockforsingleclockoperation  
orthetwoclockscanrunasynchronousofoneanotherfordualclockoperation.  
An Output Enable pin (OEA, OEB) is provided on the read port of each FIFO  
forthree-stateoutputcontrol.  
• Offers optimal combination of large capacity, high speed,  
design flexibility and small footprint  
• Ideal for prioritization, bidirectional, and width expansion  
applications  
• 10 ns read/write cycle time for the IDT72801/72811/72821/72831/  
72841 (excluding the IDT72851)  
EachofthetwoFIFOshastwofixedflags,Empty(EFA,EFB)andFull(FFA,  
FFB). Twoprogrammableflags,Almost-Empty(PAEA,PAEB)andAlmost-Full  
(PAFA,PAFB),areprovidedforeachFIFObanktoimprovememoryutilization.  
Ifnotprogrammed,theprogrammableflagsdefaulttoempty+7forPAEAand  
PAEB, and full-7 for PAFA and PAFB.  
TheIDT72801/72811/72821/72831/72841/72851architecturelendsitself  
tomanyflexibleconfigurationssuchas:  
• 2-levelprioritydatabuffering  
• 15 ns read/write cycle time for the IDT72851  
• Separate control lines and data lines for each FIFO  
• Separate Empty, Full, Programmable Almost-Empty and Almost-  
Full flags for each FIFO  
• Enable puts output data lines in high-impedance state  
• Space-saving 64-pin Thin Quad Flat Pack (TQFP) and Slim Thin  
Quad Flatpack (STQFP)  
•
Industrial temperature range (–40°C to +85°C) is available  
• Bidirectional operation  
• Width expansion  
DESCRIPTION:  
• Depthexpansion  
These FIFOs is fabricated using IDT's high-performance submicron  
CMOS technology.  
TheIDT72801/72811/72821/72831/72841/72851aredualsynchronous  
(clocked)FIFOs. ThedeviceisfunctionallyequivalenttotwoIDT72201/72211/  
72221/72231/72241/72251 FIFOs in a single package with all associated  
control,data,andflaglinesassignedtoseparatepins.  
FUNCTIONAL BLOCK DIAGRAM  
EFA  
WCLKB  
PAEA  
PAFA  
FFA  
WCLKA  
WENA1  
WENA2  
WENB1  
DA0 - DA8  
DB0 - DB8  
LDA  
LDB  
WENB2  
INPUT REGISTER  
OFFSET REGISTER  
OFFSET REGISTER  
INPUT REGISTER  
EFB  
FLAG  
LOGIC  
WRITE CONTROL  
LOGIC  
FLAG  
LOGIC  
WRITE CONTROL  
LOGIC  
PAEB  
PAFB  
FFB  
RAM ARRAY  
256 x 9, 512 x 9,  
1024 x 9, 2048 x 9,  
4096 x 9, 8192 x 9  
RAM ARRAY  
256 x 9, 512 x 9,  
1024 x 9, 2048 x 9,  
4096 x 9, 8192 x 9  
WRITE POINTER  
READ POINTER  
READ POINTER  
WRITE POINTER  
READ CONTROL  
LOGIC  
READ CONTROL  
LOGIC  
OUTPUT REGISTER  
OUTPUT REGISTER  
RESET LOGIC  
RESET LOGIC  
RCLKB  
RSA  
RSB  
OEA  
OEB  
RCLKA  
RENA1  
RENA2  
RENB1  
QB0 - QB8  
QA0 - QA8  
RENB2  
3034 drw 01  
IDT, IDT logo and the SyncFIFOlogo are trademarks of Integrated Device Technology, Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE  
APRIL 2001  
1
2001 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-3034/2  
1234567...16

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IDT72811L25TFGI IDT

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IDT72811L25TFI8 IDT

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IDT72811L25TFI9 IDT

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 		FIFO, 512X9, 15ns, Synchronous, CMOS, PQFP64, SLIM, TQFP-64
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 		FIFO, 512X9, 15ns, Synchronous, CMOS, PQFP64, STQFP-64
IDT72811L25TFSCDS-W IDT

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 		FIFO, 512X9, 15ns, Synchronous, CMOS, PQFP64, STQFP-64
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IDT72811L35TFSCDS-W ETC

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