5秒后页面跳转
IDT72402L10PB PDF预览

IDT72402L10PB

更新时间: 2024-11-10 22:36:19
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路光电二极管先进先出芯片时钟
页数 文件大小 规格书
9页 99K
描述
CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT

IDT72402L10PB 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
最大时钟频率 (fCLK):10 MHzJESD-30 代码:R-PDIP-T18
JESD-609代码:e0内存集成电路类型:OTHER FIFO
内存宽度:4端子数量:18
字数:64 words字数代码:64
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:64X4
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP18,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
认证状态:Not Qualified筛选级别:38535Q/M;38534H;883B
子类别:FIFOs最大压摆率:0.045 mA
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

IDT72402L10PB 数据手册

 浏览型号IDT72402L10PB的Datasheet PDF文件第2页浏览型号IDT72402L10PB的Datasheet PDF文件第3页浏览型号IDT72402L10PB的Datasheet PDF文件第4页浏览型号IDT72402L10PB的Datasheet PDF文件第5页浏览型号IDT72402L10PB的Datasheet PDF文件第6页浏览型号IDT72402L10PB的Datasheet PDF文件第7页 
IDT72401  
IDT72402  
IDT72403  
IDT72404  
CMOS PARALLEL FIFO  
64 x 4-BIT AND 64 x 5-BIT  
Integrated Device Technology, Inc.  
Output Enable (OE) pin. The FlFOs accept 4-bit or 5-bit data  
at the data input (D0-D3, 4). The stored data stack up on a first-  
in/first-out basis.  
FEATURES:  
• First-ln/First-Out Dual-Port memory  
• 64 x 4 organization (IDT72401/03)  
• 64 x 5 organization (IDT72402/04)  
• IDT72401/02 pin and functionally compatible with  
MMI67401/02  
• RAM-based FIFO with low falI-through time  
• Low-power consumption  
— Active: 175mW (typ.)  
A Shift Out (SO) signal causes the data at the next to last  
word to be shifted to the output while all other data shifts down  
one location in the stack. The Input Ready (IR) signal acts like  
a flag to indicate when the input is ready for new data  
(IR = HIGH) or to signal when the FIFO is full (IR = LOW). The  
Input Ready signal can also be used to cascade multiple  
devices together. The Output Ready (OR) signal is a flag to  
indicate that the output remains valid data (OR = HIGH) or to  
indicate that the FIFO is empty (OR = LOW). The Output  
Readycanalsobeusedtocascademultipledevicestogether.  
Width expansion is accomplished by logically ANDing the  
Input Ready (IR) and Output Ready (OR) signals to form  
composite signals.  
• Maximum shift rate — 45MHz  
• High data output drive capability  
• Asynchronous and simultaneous read and write  
• Fully expandable by bit width  
• Fully expandable by word depth  
• IDT72403/04 have Output Enable pin to enable output  
data  
Depth expansion is accomplished by tying the data inputs  
of one device to the data outputs of the previous device. The  
Input Ready pin of the receiving device is connected to the  
Shift Out pin of the sending device and the Output Ready pin  
of the sending device is connected to the Shift In pin of the  
receiving device.  
Reading and writing operations are completely asynchro-  
nous allowing the FIFO to be used as a buffer between two  
digital machines of widely varying operating frequencies. The  
45MHz speed makes these FlFOs ideal for high-speed  
communication and controller applications.  
• High-speed data communications applications  
• High-performance CMOS technology  
• Available in CERDIP, plastic DIP and SOIC  
• Military product compliant to MlL-STD-883, Class B  
• Standard Military Drawing #5962-86846 and  
5962-89523 is listed on this function.  
• Industrial temperature range (–40°C to +85°C) is avail-  
able, tested to military electrical specifications  
DESCRIPTION:  
The IDT72401 and IDT72403 are asynchronous high-  
performance First-ln/First-Out memories organized 64 words  
by 4 bits. The IDT72402 and IDT72404 are asynchronous  
high-performance First-ln/First-Out memories organized as  
64 words by 5 bits. The IDT72403 and IDT72404 also have an  
Military grade product is manufactured in compliance with  
the latest revision of MIL-STD-883, Class B.  
FUNCTIONAL BLOCK DIAGRAM  
OUTPUT  
ENABLE  
INPUT  
CONTROL  
LOGIC  
OE (IDT72403 and  
IDT72404)  
SI  
IR  
WRITE POINTER  
WRITE MULTIPLEXER  
D0-3  
D4  
(IDT72402  
and IDT72404)  
Q0-3  
MEMORY  
ARRAY  
DATAIN  
DATAOUT  
Q4  
(IDT72402 and  
IDT72404)  
READ MULTIPLEXER  
READ POINTER  
MASTER  
RESET  
SO  
OR  
MR  
OUTPUT  
CONTROL  
LOGIC  
2747 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
FAST is a trademark of National Semiconductor, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
SEPTEMBER 1996  
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.  
1996 Integrated Device Technology, Inc.  
DSC-2747/7  
5.01  
1

与IDT72402L10PB相关器件

型号 品牌 获取价格 描述 数据表
IDT72402L10SO IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT
IDT72402L10SO8 IDT

获取价格

FIFO, 64X5, 55ns, Asynchronous, CMOS, PDSO18, SOIC-18
IDT72402L10SOB IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT
IDT72402L15D IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT
IDT72402L15DB IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT
IDT72402L15L ETC

获取价格

x5 Asynchronous FIFO
IDT72402L15LB IDT

获取价格

FIFO, 64X5, 40ns, Asynchronous, CMOS, CQCC20, LCC-20
IDT72402L15P IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT
IDT72402L15PB IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT
IDT72402L15SO IDT

获取价格

CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT